Increase dual-core RV64 timeouts.
authorTim Newsome <tim@sifive.com>
Tue, 24 Oct 2017 18:55:01 +0000 (11:55 -0700)
committerTim Newsome <tim@sifive.com>
Tue, 24 Oct 2017 18:55:01 +0000 (11:55 -0700)
commit3d284202d1440fe7aa029fa667aec9d45b4c4892
tree85c70ec786712cbba34b0b6aa429bfab753acbb1
parent4e240fc239ea96243c15d21f69d46493c2802a40
Increase dual-core RV64 timeouts.

I need this for CompareSections to pass when I instrument spike to be
really slow.
debug/targets/RISC-V/spike64-2-rtos.py
debug/targets/RISC-V/spike64-2.py