Test debug authentication.

Also halt instead of reset spike targets, which tests a more complicated
code path.

diff --git a/debug/targets/RISC-V/spike-1.cfg b/debug/targets/RISC-V/spike-1.cfg
index 7607b4614ec47ae63ce337ea4eb3d676ea829486..f420417dcd505e5d47c03040bef6a9dc4ada7c20 100644 (file)
--- a/debug/targets/RISC-V/spike-1.cfg
+++ b/debug/targets/RISC-V/spike-1.cfg
@@ -17,4 +17,8 @@ gdb_report_data_abort enable
 riscv expose_csrs 2288
 
 init
-reset halt
+
+set challenge [ocd_riscv authdata_read]
+riscv authdata_write [expr $challenge + 1]
+
+halt

diff --git a/debug/targets/RISC-V/spike-2.cfg b/debug/targets/RISC-V/spike-2.cfg
index c78cf8f82d6078d7270415082156c2217fe710f6..114d5b880b953861066d045b20112535226c9477 100644 (file)
--- a/debug/targets/RISC-V/spike-2.cfg
+++ b/debug/targets/RISC-V/spike-2.cfg
@@ -20,4 +20,11 @@ gdb_report_data_abort enable
 riscv expose_csrs 2288
 
 init
-reset halt
+
+set challenge [ocd_riscv authdata_read]
+riscv authdata_write [expr $challenge + 1]
+
+targets $_TARGETNAME_0
+halt
+targets $_TARGETNAME_1
+halt

diff --git a/debug/targets/RISC-V/spike-rtos.cfg b/debug/targets/RISC-V/spike-rtos.cfg
index 5a70f523d56afee94c668c68399e21d3f7a2a38d..159a70fac42c7ffcaa6af1f1371ef43f0f73fdce 100644 (file)
--- a/debug/targets/RISC-V/spike-rtos.cfg
+++ b/debug/targets/RISC-V/spike-rtos.cfg
@@ -18,4 +18,8 @@ gdb_report_data_abort enable
 riscv expose_csrs 2288
 
 init
-reset halt
+
+set challenge [ocd_riscv authdata_read]
+riscv authdata_write [expr $challenge + 1]
+
+halt

diff --git a/debug/testlib.py b/debug/testlib.py
index fd587bd3188efc1dc33b5e0cf22b046d3523e869..2fa70dfb8a8a759b6705d02c7118d25673b39ac3 100644 (file)
--- a/debug/testlib.py
+++ b/debug/testlib.py
@@ -118,6 +118,7 @@ class Spike(object):
             isa = "RV%dG" % harts[0].xlen
 
         cmd += ["--isa", isa]
+        cmd += ["--debug-auth"]
 
         if not self.progbufsize is None:
             cmd += ["--progsize", str(self.progbufsize)]