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Don't assume PRV1/2 and IE1/2 are reset
authorAndrew Waterman <waterman@cs.berkeley.edu>
Wed, 25 Mar 2015 02:30:14 +0000 (19:30 -0700)
committerAndrew Waterman <waterman@cs.berkeley.edu>
Wed, 25 Mar 2015 02:30:14 +0000 (19:30 -0700)
env patch | blob | history
isa/rv64si/dirty.S patch | blob | history

diff --git a/env b/env
index afef768f9fef1c224130583fae2b54f92818a794..104ce71726ee9ae95f920b42462afb30baeeb36c 160000 (submodule)
--- a/env
+++ b/env
@@ -1 +1 @@
-Subproject commit afef768f9fef1c224130583fae2b54f92818a794
+Subproject commit 104ce71726ee9ae95f920b42462afb30baeeb36c
diff --git a/isa/rv64si/dirty.S b/isa/rv64si/dirty.S
index 78e333b62995714cccf891d4c5013a3fcf301840..e5f4db63e385e196f3400b4ab599c4f7f82cc280 100644 (file)
--- a/isa/rv64si/dirty.S
+++ b/isa/rv64si/dirty.S
@@ -19,7 +19,7 @@ RVTEST_CODE_BEGIN
   la a1, page_table_1
   csrw sptbr, a1
   sfence.vm
-  li a1, (MSTATUS_VM & ~(MSTATUS_VM<<1)) * VM_SV43
+  li a1, ((MSTATUS_VM & ~(MSTATUS_VM<<1)) * VM_SV43) | ((MSTATUS_PRV1 & ~(MSTATUS_PRV1<<1)) * PRV_S)
   csrs mstatus, a1
   la a1, 1f
   csrw mepc, a1