add extra fp16 fld tests

diff --git a/isa/rv64uf/sv_fld_elwidth.S b/isa/rv64uf/sv_fld_elwidth.S
index 17fab73762b1767813dcf15aa24efe372b408777..48bdff5ebc623294ce0ff8f02ae08ac7870d6120 100644 (file)
--- a/isa/rv64uf/sv_fld_elwidth.S
+++ b/isa/rv64uf/sv_fld_elwidth.S
@@ -45,7 +45,7 @@ RVTEST_CODE_BEGIN   # Start of test code.
         SV_ELWIDTH_TEST( fld , 3, 8, SV_W_DFLT, SV_W_DFLT, testdata1, answer2 )
         SV_ELWIDTH_TEST( fld , 3, 8, SV_W_16BIT, SV_W_DFLT, testdata3, answer3)
         SV_ELWIDTH_TEST( fld , 5, 8, SV_W_16BIT, SV_W_32BIT, testdata3, answer4)
-        SV_ELWIDTH_TEST( fld , 3, 8, SV_W_32BIT, SV_W_16BIT, testdata4, answer5)
+        SV_ELWIDTH_TEST( fld , 6, 8, SV_W_32BIT, SV_W_16BIT, testdata4, answer5)
 /*
         SV_ELWIDTH_TEST(  ld , 5, 8, SV_W_32BIT, SV_W_16BIT, testdata1,
                 0x6757271769592919,  0xa5a5a5a5a5a52616,  0xa5a5a5a5a5a5a5a5 )
@@ -112,12 +112,19 @@ testdata4:
         .float 1.0
         .float 1000.0
         .float -1152.0
+        .float -82.0
         .word 0xa5a5a5a5
 
 answer5:
 
-        .dword 0xa5a53c0051805140
-        .dword 0xa5a5a5a5a5a5a5a5
+        .short 0x5140 # 42 fp16
+        .short 0x5180 # 44 fp16
+        .short 0x3c00 # 1.0 fp16
+        .short 0x63d0 # 1000.0 fp16
+        .short 0xe480 # -1152.0 fp16
+        .short 0xd520 # -82 fp16
+        .short 0xa5a5
+        .short 0xa5a5
         .dword 0xa5a5a5a5a5a5a5a5
 
 # Output data section.