From: Tim Newsome <tim@sifive.com>
Date: Tue, 21 Jun 2016 00:25:53 +0000 (-0700)
Subject: Increase TCK speed.
X-Git-Url: https://git.libre-soc.org/?p=riscv-tests.git;a=commitdiff_plain;h=1147b6cc3de277e63744d25e8d6adcbd5ed55856;hp=3b90da94dcf6b79f8a6fc0dbe6f3225ef9d34c9e

Increase TCK speed.
---

diff --git a/debug/gdbserver.py b/debug/gdbserver.py
index 4e2b0b4..027d387 100755
--- a/debug/gdbserver.py
+++ b/debug/gdbserver.py
@@ -400,6 +400,7 @@ class MprvTest(DeleteServer):
     def test_mprv(self):
         """Test that the debugger can access memory when MPRV is set."""
         self.gdb.c(wait=False)
+        time.sleep(0.5)
         self.gdb.interrupt()
         output = self.gdb.command("p/x *(int*)(((char*)&data)-0x80000000)")
         self.assertIn("0xbead", output)
diff --git a/debug/targets/m2gl_m2s/openocd.cfg b/debug/targets/m2gl_m2s/openocd.cfg
index 2d8bfe8..3884a3e 100644
--- a/debug/targets/m2gl_m2s/openocd.cfg
+++ b/debug/targets/m2gl_m2s/openocd.cfg
@@ -1,4 +1,4 @@
-adapter_khz     1000
+adapter_khz     10000
 
 source [find interface/ftdi/olimex-arm-usb-tiny-h.cfg]