From: Tim Newsome Date: Thu, 20 Oct 2016 21:49:44 +0000 (-0700) Subject: Test OpenOCD step and resume. X-Git-Url: https://git.libre-soc.org/?p=riscv-tests.git;a=commitdiff_plain;h=30d113085a08b0cde585c7e0d8b19e0cc6cbc046 Test OpenOCD step and resume. --- diff --git a/debug/openocd.py b/debug/openocd.py index 4a71035..3807210 100755 --- a/debug/openocd.py +++ b/debug/openocd.py @@ -7,7 +7,7 @@ import sys import targets import testlib -from testlib import assertRegexpMatches +from testlib import assertIn, assertEqual class OpenOcdTest(testlib.BaseTest): def __init__(self, target): @@ -20,13 +20,42 @@ class OpenOcdTest(testlib.BaseTest): def setup(self): # pylint: disable=attribute-defined-outside-init self.cli = testlib.OpenocdCli() + self.cli.command("halt") class RegTest(OpenOcdTest): def test(self): - self.cli.command("halt") - output = self.cli.command("reg") - assertRegexpMatches(output, r"x18 \(/%d\): 0x[0-9A-F]+" % - self.target.xlen) + regs = self.cli.reg() + assertIn("x18", regs) + +class StepTest(OpenOcdTest): + def test(self): + # 0x13 is nop + for address in range(self.target.ram, self.target.ram + 16, 4): + self.cli.command("mww 0x%x 0x13" % address) + + self.cli.command("step 0x%x" % self.target.ram) + for i in range(4): + pc = self.cli.reg("pc") + assertEqual(pc, self.target.ram + 4 * (i+1)) + self.cli.command("step") + +class ResumeTest(OpenOcdTest): + def test(self): + # 0x13 is nop + for address in range(self.target.ram, self.target.ram + 32, 4): + self.cli.command("mww 0x%x 0x13" % address) + + self.cli.command("bp 0x%x 4" % (self.target.ram + 12)) + self.cli.command("bp 0x%x 4" % (self.target.ram + 24)) + + self.cli.command("resume 0x%x" % self.target.ram) + assertEqual(self.cli.reg("pc"), self.target.ram + 12) + + self.cli.command("resume") + assertEqual(self.cli.reg("pc"), self.target.ram + 24) + + self.cli.command("resume 0x%x" % self.target.ram) + assertEqual(self.cli.reg("pc"), self.target.ram + 12) def main(): parser = argparse.ArgumentParser( diff --git a/debug/testlib.py b/debug/testlib.py index 100b124..a38b99b 100644 --- a/debug/testlib.py +++ b/debug/testlib.py @@ -173,9 +173,23 @@ class OpenocdCli(object): def command(self, cmd): self.child.sendline(cmd) + self.child.expect(cmd) self.child.expect("\n") self.child.expect("> ") - return self.child.before.strip() + return self.child.before.strip("\t\r\n \0") + + def reg(self, reg=''): + output = self.command("reg %s" % reg) + matches = re.findall(r"(\w+) \(/\d+\): (0x[0-9A-F]+)", output) + values = {r: int(v, 0) for r, v in matches} + if reg: + return values[reg] + return values + + def load_image(self, image): + output = self.command("load_image %s" % image) + if 'invalid ELF file, only 32bits files are supported' in output: + raise TestNotApplicable(output) class CannotAccess(Exception): def __init__(self, address): @@ -372,6 +386,8 @@ class BaseTest(object): try: self.setup() result = self.test() # pylint: disable=no-member + except TestNotApplicable: + result = "not_applicable" except Exception as e: # pylint: disable=broad-except if isinstance(e, TestFailed): result = "fail" @@ -403,6 +419,11 @@ class TestFailed(Exception): Exception.__init__(self) self.message = message +class TestNotApplicable(Exception): + def __init__(self, message): + Exception.__init__(self) + self.message = message + def assertEqual(a, b): if a != b: raise TestFailed("%r != %r" % (a, b))