From: Joakim Andersson <joerchan@gmail.com>
Date: Sun, 12 Apr 2015 21:50:05 +0000 (+0200)
Subject: Better coverage of mul high instructions
X-Git-Url: https://git.libre-soc.org/?p=riscv-tests.git;a=commitdiff_plain;h=75f9bc244d43359750bf53660b6a7a36ee11e4ed;ds=sidebyside

Better coverage of mul high instructions
---

diff --git a/isa/rv32ui/mul.S b/isa/rv32ui/mul.S
index b3ec446..0368629 100644
--- a/isa/rv32ui/mul.S
+++ b/isa/rv32ui/mul.S
@@ -31,6 +31,12 @@ RVTEST_CODE_BEGIN
   TEST_RR_OP(30,  mul, 0x0000ff7f, 0xaaaaaaab, 0x0002fe7d );
   TEST_RR_OP(31,  mul, 0x0000ff7f, 0x0002fe7d, 0xaaaaaaab );
 
+  TEST_RR_OP(34,  mul, 0x00000000, 0xff000000, 0xff000000 );
+
+  TEST_RR_OP(35,  mul, 0x00000001, 0xffffffff, 0xffffffff );
+  TEST_RR_OP(36,  mul, 0xffffffff, 0xffffffff, 0x00000001 );
+  TEST_RR_OP(37,  mul, 0xffffffff, 0x00000001, 0xffffffff );
+
   #-------------------------------------------------------------
   # Source/Destination tests
   #-------------------------------------------------------------
diff --git a/isa/rv32ui/mulh.S b/isa/rv32ui/mulh.S
index 3f96931..3b34b6a 100644
--- a/isa/rv32ui/mulh.S
+++ b/isa/rv32ui/mulh.S
@@ -25,6 +25,16 @@ RVTEST_CODE_BEGIN
   TEST_RR_OP( 6,  mulh, 0x00000000, 0x80000000, 0x00000000 );
   TEST_RR_OP( 7,  mulh, 0x00000000, 0x80000000, 0x00000000 );
 
+  TEST_RR_OP(30,  mulh, 0xfffe0101, 0xaaaaaaab, 0x0002fe7d );
+  TEST_RR_OP(31,  mulh, 0xfffe0101, 0x0002fe7d, 0xaaaaaaab );
+
+  TEST_RR_OP(32,  mulh, 0xfe010000, 0xff000000, 0xff000000 );
+
+  TEST_RR_OP(33,  mulh, 0xfffffffe, 0xffffffff, 0xffffffff );
+  TEST_RR_OP(34,  mulh, 0xffffffff, 0xffffffff, 0x00000001 );
+  TEST_RR_OP(35,  mulh, 0xffffffff, 0x00000001, 0xffffffff );
+
+
   #-------------------------------------------------------------
   # Source/Destination tests
   #-------------------------------------------------------------
diff --git a/isa/rv32ui/mulhsu.S b/isa/rv32ui/mulhsu.S
index 1d3dd3e..93e698c 100644
--- a/isa/rv32ui/mulhsu.S
+++ b/isa/rv32ui/mulhsu.S
@@ -25,6 +25,15 @@ RVTEST_CODE_BEGIN
   TEST_RR_OP( 6,  mulhsu, 0x00000000, 0x80000000, 0x00000000 );
   TEST_RR_OP( 7,  mulhsu, 0x80004000, 0x80000000, 0xffff8000 );
 
+  TEST_RR_OP(30,  mulhsu, 0xfffe0101, 0xaaaaaaab, 0x0002fe7d );
+  TEST_RR_OP(31,  mulhsu, 0x0001fefe, 0x0002fe7d, 0xaaaaaaab );
+
+  TEST_RR_OP(32,  mulhsu, 0x01ff0000, 0xff000000, 0xff000000 );
+
+  TEST_RR_OP(33,  mulhsu, 0x00000001, 0xffffffff, 0xffffffff );
+  TEST_RR_OP(34,  mulhsu, 0xffffffff, 0xffffffff, 0x00000001 );
+  TEST_RR_OP(35,  mulhsu, 0x00000000, 0x00000001, 0xffffffff );
+
   #-------------------------------------------------------------
   # Source/Destination tests
   #-------------------------------------------------------------
diff --git a/isa/rv32ui/mulhu.S b/isa/rv32ui/mulhu.S
index 70301d2..601dcff 100644
--- a/isa/rv32ui/mulhu.S
+++ b/isa/rv32ui/mulhu.S
@@ -28,6 +28,12 @@ RVTEST_CODE_BEGIN
   TEST_RR_OP(30,  mulhu, 0x0001fefe, 0xaaaaaaab, 0x0002fe7d );
   TEST_RR_OP(31,  mulhu, 0x0001fefe, 0x0002fe7d, 0xaaaaaaab );
 
+  TEST_RR_OP(32,  mulhu, 0xfe010000, 0xff000000, 0xff000000 );
+
+  TEST_RR_OP(33,  mulhu, 0xfffffffe, 0xffffffff, 0xffffffff );
+  TEST_RR_OP(34,  mulhu, 0x00000000, 0xffffffff, 0x00000001 );
+  TEST_RR_OP(35,  mulhu, 0x00000000, 0x00000001, 0xffffffff );
+
   #-------------------------------------------------------------
   # Source/Destination tests
   #-------------------------------------------------------------