From: Andrew Waterman <waterman@cs.berkeley.edu>
Date: Sat, 21 Sep 2013 13:32:12 +0000 (-0700)
Subject: Re-enable virtual memory tests
X-Git-Url: https://git.libre-soc.org/?p=riscv-tests.git;a=commitdiff_plain;h=8dd97c2e7af399bc04b9d132bd1f1a4bdbbfec57

Re-enable virtual memory tests
---

diff --git a/env/v/vm.c b/env/v/vm.c
index bfbf197..173287a 100644
--- a/env/v/vm.c
+++ b/env/v/vm.c
@@ -99,7 +99,7 @@ void handle_fault(unsigned long addr)
   __builtin___clear_cache(0,0);
 }
 
-void emulate_vxcptsave(trapframe_t* tf)
+static void emulate_vxcptsave(trapframe_t* tf)
 {
   long where = tf->gpr[(tf->insn >> 22) & 0x1F];
 
@@ -107,7 +107,7 @@ void emulate_vxcptsave(trapframe_t* tf)
   fencevl();
 }
 
-void do_vxcptrestore(long* where)
+static void do_vxcptrestore(long* where)
 {
   vxcpthold();
 
@@ -152,7 +152,7 @@ void do_vxcptrestore(long* where)
   }
 }
 
-void emulate_vxcptrestore(trapframe_t* tf)
+static void emulate_vxcptrestore(trapframe_t* tf)
 {
   long* where = (long*)tf->gpr[(tf->insn >> 22) & 0x1F];
   vxcptkill();
@@ -160,7 +160,7 @@ void emulate_vxcptrestore(trapframe_t* tf)
   do_vxcptrestore(where);
 }
 
-void restore_vector(trapframe_t* tf)
+static void restore_vector(trapframe_t* tf)
 {
   mtpcr(PCR_VECBANK, tf->vecbank);
   //vcfg(tf->veccfg);
@@ -191,10 +191,12 @@ void handle_trap(trapframe_t* tf)
 
     if (tf->insn == fssr)
       terminate(1); // FP test on non-FP hardware.  "succeed."
+#if 0
     else if ((tf->insn & 0xF83FFFFF) == 0x37B)
       emulate_vxcptsave(tf);
     else if ((tf->insn & 0xF83FFFFF) == 0x77B)
       emulate_vxcptrestore(tf);
+#endif
     else
       assert(0);
     tf->epc += 4;
@@ -243,7 +245,12 @@ void vm_boot(long test_addr, long seed)
   // relocate
   long adjustment = RELOC(0L), tmp;
   mtpcr(PCR_EVEC, (char*)&trap_entry + adjustment);
-  asm volatile ("add sp, sp, %1; rdpc %0; addi %0, %0, 16; add %0, %0, %1; jr %0" : "=&r"(tmp) : "r"(adjustment));
+  asm volatile ("add sp, sp, %1\n"
+                "jal %0, 1f\n"
+                "1: add %0, %0, %1\n"
+                "jr %0, 8"
+                : "=&r"(tmp)
+                : "r"(adjustment));
 
   memset(RELOC(&l3pt[0]), 0, MAX_TEST_PAGES*sizeof(pte_t));
   mtpcr(PCR_FATC, 0);
diff --git a/isa/Makefile b/isa/Makefile
index e81f696..553e692 100644
--- a/isa/Makefile
+++ b/isa/Makefile
@@ -75,8 +75,8 @@ $(eval $(call compile_template,rv64uv))
 $(eval $(call compile_template,rv64si))
 $(eval $(call compile_template,rv64sv))
 
-tests_dump = $(addsuffix .dump, $(tests))
-tests_hex = $(addsuffix .hex, $(tests))
+tests_dump = $(addsuffix .dump, $(spike_tests))
+tests_hex = $(addsuffix .hex, $(spike_tests))
 tests_out = $(addsuffix .out, $(spike_tests))
 
 run: $(tests_out)
diff --git a/isa/rv64ui/Makefrag b/isa/rv64ui/Makefrag
index adb015a..3f77dc7 100644
--- a/isa/rv64ui/Makefrag
+++ b/isa/rv64ui/Makefrag
@@ -49,4 +49,4 @@ rv64ui_p_vec_tests = $(addprefix rv64ui-p-vec-, $(rv64ui_sc_vec_tests))
 rv64ui_pt_vec_tests = $(addprefix rv64ui-pt-vec-, $(rv64ui_sc_vec_tests))
 rv64ui_v_vec_tests = $(addprefix rv64ui-v-vec-, $(rv64ui_sc_vec_tests))
 
-spike_tests += $(rv64ui_p_tests) $(rv64ui_pm_tests) #$(rv64ui_v_tests) $(rv64ui_p_vec_tests) $(rv64ui_pt_vec_tests) $(rv64ui_v_vec_tests)
+spike_tests += $(rv64ui_p_tests) $(rv64ui_pm_tests) $(rv64ui_v_tests) #$(rv64ui_p_vec_tests) $(rv64ui_pt_vec_tests) $(rv64ui_v_vec_tests)