From: Andrew Waterman <andrew@sifive.com>
Date: Fri, 7 Sep 2018 01:45:14 +0000 (-0700)
Subject: Revert "breakpoint.S: Don't assume trigger is hardwired to breakpoint (#158) (#159)"
X-Git-Url: https://git.libre-soc.org/?p=riscv-tests.git;a=commitdiff_plain;h=9d3bc86d85d935f498065d54ead7e568f03b2824

Revert "breakpoint.S: Don't assume trigger is hardwired to breakpoint (#158) (#159)"

This reverts commit 901a2694d5384e4ef9af8e4fb0c9a07eb24d0028,
under the advisement of @tommythorn in #158.
---

diff --git a/isa/rv64mi/breakpoint.S b/isa/rv64mi/breakpoint.S
index df415a1..647430b 100644
--- a/isa/rv64mi/breakpoint.S
+++ b/isa/rv64mi/breakpoint.S
@@ -29,7 +29,7 @@ RVTEST_CODE_BEGIN
 
   la a2, 1f
   csrw tdata2, a2
-  li a0, (2 << (__riscv_xlen - 4)) | MCONTROL_M | MCONTROL_EXECUTE
+  li a0, MCONTROL_M | MCONTROL_EXECUTE
   csrw tdata1, a0
   # Skip if breakpoint type is unsupported.
   csrr a1, tdata1