From: Tim Newsome <tim@sifive.com>
Date: Thu, 11 Aug 2016 19:15:04 +0000 (-0700)
Subject: Make simple memory test errors more readable.
X-Git-Url: https://git.libre-soc.org/?p=riscv-tests.git;a=commitdiff_plain;h=b974a55ac40030fc61120b8881f16ef1abc20e34;ds=sidebyside

Make simple memory test errors more readable.
---

diff --git a/debug/gdbserver.py b/debug/gdbserver.py
index f20630e..2558a6c 100755
--- a/debug/gdbserver.py
+++ b/debug/gdbserver.py
@@ -61,6 +61,9 @@ def ihex_parse(line):
         data += "%c" % int(line[8+2*i:10+2*i], 16)
     return record_type, address, data
 
+def readable_binary_string(s):
+    return "".join("%02x" % ord(c) for c in s)
+
 class DeleteServer(unittest.TestCase):
     def tearDown(self):
         del self.server
@@ -162,7 +165,8 @@ class SimpleMemoryTest(DeleteServer):
         for line in b:
             record_type, address, line_data = ihex_parse(line)
             if (record_type == 0):
-                self.assertEqual(line_data, data[address:address+len(line_data)])
+                self.assertEqual(readable_binary_string(line_data),
+                        readable_binary_string(data[address:address+len(line_data)]))
 
 class InstantHaltTest(DeleteServer):
     def setUp(self):