From: Andrew Waterman <andrew@sifive.com>
Date: Fri, 4 Aug 2017 17:20:00 +0000 (-0700)
Subject: RV32 div tests should use -2^31 for min value, not -2^63
X-Git-Url: https://git.libre-soc.org/?p=riscv-tests.git;a=commitdiff_plain;h=c26d7f39e6fabde07f16fd35d67a2414e674d488

RV32 div tests should use -2^31 for min value, not -2^63
---

diff --git a/isa/rv32um/div.S b/isa/rv32um/div.S
index a4504a7..24dc9ff 100644
--- a/isa/rv32um/div.S
+++ b/isa/rv32um/div.S
@@ -22,10 +22,10 @@ RVTEST_CODE_BEGIN
   TEST_RR_OP( 4, div, -3,  20,  -6 );
   TEST_RR_OP( 5, div,  3, -20,  -6 );
 
-  TEST_RR_OP( 6, div, -1<<63, -1<<63,  1 );
-  TEST_RR_OP( 7, div, -1<<63, -1<<63, -1 );
+  TEST_RR_OP( 6, div, -1<<31, -1<<31,  1 );
+  TEST_RR_OP( 7, div, -1<<31, -1<<31, -1 );
 
-  TEST_RR_OP( 8, div, -1, -1<<63, 0 );
+  TEST_RR_OP( 8, div, -1, -1<<31, 0 );
   TEST_RR_OP( 9, div, -1,      1, 0 );
   TEST_RR_OP(10, div, -1,      0, 0 );
 
diff --git a/isa/rv32um/rem.S b/isa/rv32um/rem.S
index c318e2c..7955736 100644
--- a/isa/rv32um/rem.S
+++ b/isa/rv32um/rem.S
@@ -22,10 +22,10 @@ RVTEST_CODE_BEGIN
   TEST_RR_OP( 4, rem,  2,  20,  -6 );
   TEST_RR_OP( 5, rem, -2, -20,  -6 );
 
-  TEST_RR_OP( 6, rem,  0, -1<<63,  1 );
-  TEST_RR_OP( 7, rem,  0, -1<<63, -1 );
+  TEST_RR_OP( 6, rem,  0, -1<<31,  1 );
+  TEST_RR_OP( 7, rem,  0, -1<<31, -1 );
 
-  TEST_RR_OP( 8, rem, -1<<63, -1<<63, 0 );
+  TEST_RR_OP( 8, rem, -1<<31, -1<<31, 0 );
   TEST_RR_OP( 9, rem,      1,      1, 0 );
   TEST_RR_OP(10, rem,      0,      0, 0 );
 
diff --git a/isa/rv32um/remu.S b/isa/rv32um/remu.S
index 38d641d..a96cfc1 100644
--- a/isa/rv32um/remu.S
+++ b/isa/rv32um/remu.S
@@ -22,10 +22,10 @@ RVTEST_CODE_BEGIN
   TEST_RR_OP( 4, remu,  20,  20,  -6 );
   TEST_RR_OP( 5, remu, -20, -20,  -6 );
 
-  TEST_RR_OP( 6, remu,      0, -1<<63,  1 );
-  TEST_RR_OP( 7, remu, -1<<63, -1<<63, -1 );
+  TEST_RR_OP( 6, remu,      0, -1<<31,  1 );
+  TEST_RR_OP( 7, remu, -1<<31, -1<<31, -1 );
 
-  TEST_RR_OP( 8, remu, -1<<63, -1<<63, 0 );
+  TEST_RR_OP( 8, remu, -1<<31, -1<<31, 0 );
   TEST_RR_OP( 9, remu,      1,      1, 0 );
   TEST_RR_OP(10, remu,      0,      0, 0 );