Clean up .pyc files.
[riscv-tests.git] / benchmarks / dhrystone /
2016-07-08 Andrew WatermanDon't use FPU in benchmarks that don't need to use...
2016-03-15 Andrew WatermanRework benchmarks to run in M-mode
2016-03-01 Colin SchmidtMerge pull request #8 from riscv/sqrt-171
2016-02-27 Palmer DabbeltMerge pull request #10 from riscv/travis-dev
2016-02-27 Colin Schmidtremove malloc declaration from dhrystone
2015-05-01 Andrew WatermanFix dhrystone timing code
2015-05-01 Andrew WatermanMake dhrystone report correct-ish numbers
2015-01-10 Andrew WatermanAdd LICENSE
2015-01-05 Andrew WatermanAvoid deprecated "b" pseudo-op; use "j" instead
2014-02-11 Adam IzraelevitzMerge branch 'master' of github.com:ucb-bar/riscv-tests
2014-02-06 Andrew WatermanClean up benchmarks; support uarch-specific counters
2013-10-10 Christopher CelioMerge branch 'master' of github.com:ucb-bar/riscv-tests
2013-10-10 Christopher CelioBenchmarks now run in user-mode.
2013-08-24 Andrew WatermanReflect changes to ISA
2013-04-30 Yunsup Leebenchmarks initial commit