Add basic multicore test.
[riscv-tests.git] / debug / targets / freedom-u500-sim / openocd.cfg
2017-05-16 Palmer DabbeltMerge pull request #47 from riscv/debug-0.13
2017-05-16 Megan Wachsdebug: Update OpenOCD configs.
2017-05-15 Megan WachsMerge remote-tracking branch 'origin/priv-1.10' into...
2017-04-17 Megan WachsMerge remote-tracking branch 'origin/newprogram' into...
2017-04-14 Megan Wachsdebug: checkpoint of trying to get simulation tests...
2017-04-14 Megan Wachsdebug: working with newprogram branch
2016-10-19 Tim NewsomeMerge pull request #34 from richardxia/use-port-randomi...
2016-10-18 Richard XiaPull port number from VCS output and pass to OpenOCD.
2016-08-12 Tim NewsomeMerge pull request #21 from sifive/add_freedom_sim_targets
2016-08-11 Megan WachsAdd FreedomU500 & incorporate feedback
2016-08-08 Megan WachsAdd U500 Target