git.libre-soc.org Git - riscv-tests.git/history

2017-04-15	Andrew Waterman	Fix illegal-instruction test when S-mode is not implemented	blob \| commitdiff \| raw
2017-04-08	Andrew Waterman	Retrofit rv64mi-p-illegal to test vectored interrupts	blob \| commitdiff \| raw \| diff to current
2017-03-13	Andrew Waterman	Test mstatus.TW, mstatus.TVM, and mstatus.TSR features	blob \| commitdiff \| raw \| diff to current
2016-05-01	Andrew Waterman	ERET -> xRET; new memory map	blob \| commitdiff \| raw \| diff to current
2016-03-15	Andrew Waterman	Merge branch 'priv-1.9'	blob \| commitdiff \| raw \| diff to current
2016-03-03	Andrew Waterman	Some S-mode tests really only belong in M-mode	blob \| commitdiff \| raw \| diff to current
2015-03-25	Yunsup Lee	split out S-mode tests and M-mode tests	blob \| commitdiff \| raw \| diff to current