Don't use stats register; refer to uarch counters by number
[riscv-tests.git] / isa / rv64mi / timer.S
2016-03-15 Andrew WatermanMerge branch 'priv-1.9'
2016-03-03 Andrew WatermanWIP on priv spec v1.9
2015-12-04 Andrew WatermanMerge pull request #4 from pmundkur/devel
2015-10-19 Andrew WatermanAvoid REMU in timer test
2015-07-05 Andrew WatermanNew M-mode timers
2015-03-25 Yunsup Leesplit out S-mode tests and M-mode tests