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[riscv-tests.git] / isa / rv64si /
2018-08-22 Tim NewsomeMerge branch 'master' of https://github.com/riscv/riscv... tree | commitdiff
2018-08-21 Srivatsa YogendraChanging the register mstatus is read into (#152) tree | commitdiff
2018-08-21 Andrew WatermanRevert "Fix to solve the failing tests shamt, csr and... tree | commitdiff
2018-08-18 Srivatsa YogendraFix to solve the failing tests shamt, csr and scall... tree | commitdiff
2018-03-21 Andrew WatermanMake misa.C test conform to Hauser proposal tree | commitdiff
2018-02-27 Andrew WatermanAdd test for clearing misa.C while PC is misaligned... tree | commitdiff
2017-11-27 Andrew WatermanRename sbadaddr to satp tree | commitdiff
2017-11-22 Christopher CelioCheck sepc for rv64si/scall test. (#107) tree | commitdiff
2017-11-12 Andrew WatermanMake sure that code is 4-byte aligned before disabling... tree | commitdiff
2017-11-10 Andrew WatermanMake rv64mi-p-ecall work when U-mode is not present tree | commitdiff
2017-11-10 Andrew WatermanUse mstatus.MPP to check existence of U-mode tree | commitdiff
2017-11-01 Christopher CelioSBREAK test now checks EPC value. (#92) tree | commitdiff
2017-10-30 Richard XiaDeclare trap handlers as global symbols. (#87) tree | commitdiff
2017-10-27 Andrew WatermanVerify that mtval/stval is written correctly on misalig... tree | commitdiff
2017-10-27 Richard XiaFix rv64mi-csr for the case where U-mode is not availab... tree | commitdiff
2017-09-12 Tim NewsomeMerge pull request #69 from riscv/multicore tree | commitdiff
2017-09-01 Andrew WatermanImprove ma_fetch test to cover JAL and branches tree | commitdiff
2017-08-08 Palmer DabbeltMerge pull request #62 from richardxia/only-emit-f... tree | commitdiff
2017-08-07 Richard Xiarv64[ms]i-csr: Only emit F instructions when compiled... tree | commitdiff
2017-05-16 Palmer DabbeltMerge pull request #47 from riscv/debug-0.13 tree | commitdiff
2017-05-05 Andrew WatermanCheck UXL in sstatus tree | commitdiff
2017-05-05 Andrew WatermanTest that superpage PTEs trap when PPN LSBs are set tree | commitdiff
2017-05-05 Andrew WatermanRegularize control flow in dirty-bit test tree | commitdiff
2017-04-17 Megan WachsMerge remote-tracking branch 'origin/priv-1.10' into... tree | commitdiff
2017-03-30 Andrew WatermanExpand dirty-bit test to test MPRV and SUM tree | commitdiff
2017-03-27 Andrew WatermanSeparate page faults from physical memory access exceptions tree | commitdiff
2017-03-21 Andrew WatermanAllow supervisor access to user pages in dirty-bit... tree | commitdiff
2017-03-09 Andrew WatermanPermit flexible dirty-bit behavior tree | commitdiff
2016-11-01 Andrew WatermanMake sure FP stores don't write memory if mstatus.FS=0. tree | commitdiff
2016-08-27 Andrew WatermanUpdate to new breakpoint & counter spec tree | commitdiff
2016-07-22 Howard Maoskip user-mode trap tests in rv32mi/rv64mi-p-csr if... tree | commitdiff
2016-07-22 Andrew WatermanMove dirty bit test to rv64si directory tree | commitdiff
2016-07-22 Andrew WatermanMake ma_fetch test robust against code size changes tree | commitdiff
2016-07-12 Andrew WatermanRemove instruction width assumptions to support RVC tree | commitdiff
2016-07-08 Andrew WatermanUpdate WFI test for priv v1.9 tree | commitdiff
2016-05-02 Andrew WatermanRemove incorrect M-mode WFI test tree | commitdiff
2016-05-01 Andrew WatermanERET -> xRET; new memory map tree | commitdiff
2016-03-15 Andrew WatermanMerge branch 'priv-1.9' tree | commitdiff
2016-03-03 Andrew WatermanMake WFI test more strict tree | commitdiff
2016-03-03 Andrew WatermanSome S-mode tests really only belong in M-mode tree | commitdiff
2016-03-03 Andrew WatermanFix ma_fetch to work with or without RVC tree | commitdiff
2016-03-03 Andrew WatermanWIP on priv spec v1.9 tree | commitdiff
2015-07-05 Andrew WatermanNew M-mode timers tree | commitdiff
2015-05-19 Andrew WatermanAdd basic WFI test tree | commitdiff
2015-05-09 Andrew WatermanUpdate to privileged architecture version 1.7 tree | commitdiff
2015-03-25 Yunsup Leesplit out S-mode tests and M-mode tests tree | commitdiff
2015-03-25 Andrew WatermanDon't assume PRV1/2 and IE1/2 are reset tree | commitdiff
2015-03-21 Andrew WatermanMerge rv64si and rv32si tests tree | commitdiff
2015-03-17 Andrew WatermanMerge [shm]call into ecall, [shm]ret into eret tree | commitdiff
2015-03-14 Andrew WatermanAdd PTE dirty bit test tree | commitdiff
2015-03-13 Andrew WatermanUpdate to new privileged spec tree | commitdiff
2015-02-19 Andrew WatermanUnify rv32/rv64 timer tests tree | commitdiff
2015-01-10 Andrew WatermanAdd LICENSE tree | commitdiff
2015-01-05 Andrew WatermanAvoid deprecated "b" pseudo-op; use "j" instead tree | commitdiff
2014-12-04 Andrew WatermanMake timer test more thorough tree | commitdiff
2014-05-08 Andrew WatermanAdd timer interrupt test tree | commitdiff
2014-02-11 Adam IzraelevitzMerge branch 'master' of github.com:ucb-bar/riscv-tests tree | commitdiff
2014-02-01 Andrew WatermanAdd rv32si tests, including illegality of shamt[5] tree | commitdiff
2014-01-31 Andrew WatermanMake CSR test much more robust tree | commitdiff
2014-01-22 Andrew WatermanAdd CSRRx/CSRRxI test tree | commitdiff
2013-11-24 Andrew WatermanUpdate to new privileged ISA tree | commitdiff
2013-08-24 Andrew WatermanReflect changes to ISA tree | commitdiff
2013-04-24 Yunsup Leecleanup Makefiles in isa tree | commitdiff
2013-04-22 Yunsup Leeinitial commit tree | commitdiff