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Add some immediate trigger tests.
[riscv-tests.git]
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isa
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rv64ud
/
2016-08-12
Tim Newsome
Merge pull request #21 from sifive/add_freedom_sim_targets
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2016-08-08
Colin Schmidt
move fclass macros into the same file as the rest ...
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2016-06-22
Howard Mao
split up rv64uf and rv64ud isa tests
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