minor mt updates
[riscv-tests.git] / isa / rv64uv /
2014-03-02 Yunsup Leeadd vfmsv.{s,d} tests
2014-02-28 Yunsup Leeadd keepcfg test
2014-02-27 Yunsup Leetest to see whether vector unit is able to take 2 fmas...
2014-02-11 Adam IzraelevitzMerge branch 'master' of github.com:ucb-bar/riscv-tests
2014-02-04 Quan NguyenAdd vfmsv instruction test, change vsetprec to vsetucfg
2014-01-31 Andrew WatermanReference TESTNUM instead of x28 directly
2014-01-21 Quan NguyenAdd packed vvadd test for confprec Hwacha
2013-11-29 Albert OuFix load offsets for the vvadd_fw test
2013-11-20 Quan NguyenAdd rv64uv-p-amoxor_{w,d} tests
2013-11-20 Yunsup Leefix rv64uv/vvadd_fd test to correctly check results
2013-11-06 Yunsup Leecorrectly set SR_EA bit for all vector physical tests
2013-10-19 Yunsup Leerevamp pt tests as well
2013-10-19 Yunsup Leehwacha virtual tests working
2013-10-17 Yunsup Leedisable vector bank tests
2013-10-17 Yunsup Leeadd passing physical vector tests back in
2013-10-17 Yunsup Leeupdate out-of-date floating-point test in rv64uv
2013-10-17 Yunsup Leefix broken amoor_w rv64uv test
2013-10-10 Christopher CelioMerge branch 'master' of github.com:ucb-bar/riscv-tests
2013-10-10 Yunsup Leerevamp hwacha tests
2013-08-24 Andrew WatermanReflect changes to ISA
2013-04-24 Yunsup Leecleanup Makefiles in isa
2013-04-24 Yunsup Leeadd missing RVTEST_CODE_END macros
2013-04-22 Yunsup Leeinitial commit