bump env
[riscv-tests.git] / isa /
2018-09-08 Andrew WatermanMerge branch 'tommythorn-master'
2018-09-08 Tommy ThornRV64 s{ll,ra,rl}w tests with non-canonical values
2018-09-07 Andrew WatermanRevert "breakpoint.S: Don't assume trigger is hardwired...
2018-09-06 Tommy Thornbreakpoint.S: Don't assume trigger is hardwired to...
2018-08-22 Tim NewsomeMerge branch 'master' of https://github.com/riscv/riscv...
2018-08-21 Srivatsa YogendraChanging the register mstatus is read into (#152)
2018-08-21 Andrew WatermanRevert "Fix to solve the failing tests shamt, csr and...
2018-08-18 Srivatsa YogendraFix to solve the failing tests shamt, csr and scall...
2018-08-17 Srivatsa Yogendramaking mtvec_handler global (#150)
2018-07-09 Andrew WatermanCheck that SC yields the load reservation
2018-05-01 Christopher Celio[rv64ua/lrsc] Initialize memory read out. (#135)
2018-04-09 Andrei TatarnikovFix #120: Instructions 'sll' are replaced with 'slli...
2018-03-21 Andrew WatermanMake misa.C test conform to Hauser proposal
2018-02-27 Andrew WatermanAdd test for clearing misa.C while PC is misaligned...
2018-01-03 Andrew WatermanTest access exception behavior for illegal addresses...
2017-11-27 Andrew WatermanRename sbadaddr to satp
2017-11-27 TorbjørnRv32ud tests (#108)
2017-11-22 Christopher CelioCheck sepc for rv64si/scall test. (#107)
2017-11-20 Andrew WatermanCheck mtval in rv64mi-p-illegal (#104)
2017-11-12 Andrew WatermanMake sure that code is 4-byte aligned before disabling...
2017-11-10 Andrew WatermanMake rv64mi-p-ecall work when U-mode is not present
2017-11-10 Andrew WatermanUse mstatus.MPP to check existence of U-mode
2017-11-01 Christopher CelioSBREAK test now checks EPC value. (#92)
2017-10-30 Richard XiaRemove cache miss test from last AMO test. (#88)
2017-10-30 Richard XiaDeclare trap handlers as global symbols. (#87)
2017-10-27 Andrew WatermanVerify that mtval/stval is written correctly on misalig...
2017-10-27 Richard XiaFix rv64mi-csr for the case where U-mode is not availab...
2017-09-12 Tim NewsomeMerge pull request #69 from riscv/multicore
2017-09-01 Andrew WatermanImprove ma_fetch test to cover JAL and branches
2017-08-08 Palmer DabbeltMerge pull request #62 from richardxia/only-emit-f...
2017-08-07 Richard Xiarv64[ms]i-csr: Only emit F instructions when compiled...
2017-08-04 Andrew WatermanRV32 div tests should use -2^31 for min value, not...
2017-08-04 Andrew WatermanImprove RVC test
2017-05-25 Palmer DabbeltMerge pull request #53 from richardxia/fail-if-simulato...
2017-05-22 Andrew WatermanminNum -> minimumNumber
2017-05-18 Megan WachsMerge pull request #52 from riscv/vcs_sim_cmd
2017-05-17 Andrew WatermanManually assemble bad shift amount, since assembler...
2017-05-16 Palmer DabbeltMerge pull request #47 from riscv/debug-0.13
2017-05-05 Andrew WatermanCheck UXL in sstatus
2017-05-05 Andrew WatermanTest that superpage PTEs trap when PPN LSBs are set
2017-05-05 Andrew WatermanRegularize control flow in dirty-bit test
2017-04-17 Megan WachsMerge remote-tracking branch 'origin/newprogram' into...
2017-04-17 Megan WachsMerge remote-tracking branch 'origin/priv-1.10' into...
2017-04-15 Andrew WatermanFix illegal-instruction test when S-mode is not implemented
2017-04-11 Andrew WatermanImprove fp ldst/move tests; remove redundant fsgnj...
2017-04-08 Andrew WatermanRetrofit rv64mi-p-illegal to test vectored interrupts
2017-04-07 Andrew WatermanRemove defunct IPI tests
2017-04-06 Andrew WatermanMake ma_addr test work for systems with misaligned...
2017-03-30 Andrew WatermanExpand dirty-bit test to test MPRV and SUM
2017-03-27 Andrew WatermanSeparate page faults from physical memory access exceptions
2017-03-22 Andrew WatermanClean up benchmarks build
2017-03-21 Andrew WatermanAllow supervisor access to user pages in dirty-bit...
2017-03-21 Andrew WatermanAvoid x3 (gp), which is now TESTNUM
2017-03-13 Andrew WatermanTest mstatus.TW, mstatus.TVM, and mstatus.TSR features
2017-03-09 Andrew WatermanDon't link ISA tests against libc
2017-03-09 Andrew WatermanPermit flexible dirty-bit behavior
2017-03-09 Andrew WatermanCheck mbadaddr in ma_addr test
2017-02-02 Andrew WatermanUse NaN macros
2017-02-02 Andrew WatermanTest FMIN/FMAX NaN behavior
2017-02-01 Andrew WatermanTest qNaN and sNaN inputs to FP comparisons
2017-01-04 Andrew WatermanSpecify Spike ISA explicitly
2017-01-04 Andrew WatermanRemove Hwacha macros
2017-01-04 Andrew WatermanMask off large constants for RV32
2016-12-13 Andrew WatermanPass newly updated -march, -mabi options to gcc
2016-12-07 Andrew Watermanavoid non-standard predefined macros
2016-11-21 Andrew WatermanRemove cache miss test from all but one AMO test
2016-11-01 Andrew WatermanMake sure FP stores don't write memory if mstatus.FS=0.
2016-10-10 Andrew WatermanAlign FP data sections
2016-09-07 Andrew WatermanAdd rv32uf tests
2016-09-02 Andrew WatermanMake RVC test fit in 16 KiB
2016-08-31 Brett CannonChange accidental use of SLTIU in SLTI tests (#26)
2016-08-30 Andrew WatermanShare code between rv32ui and rv64ui tests
2016-08-30 Andrew WatermanAdd missing RV32 slt[i]u tests
2016-08-27 Andrew WatermanUpdate to new breakpoint & counter spec
2016-08-17 Andrew WatermanImprove AMO tests
2016-08-16 Andrew WatermanMake ENTROPY deterministic
2016-08-12 Tim NewsomeMerge pull request #21 from sifive/add_freedom_sim_targets
2016-08-08 Colin Schmidtmove fclass macros into the same file as the rest ...
2016-08-08 Megan WachsMerge remote-tracking branch 'origin/master'
2016-07-29 Andrew WatermanAdd RV32 RVC and breakpoint tests
2016-07-29 Andrew WatermanAdd an RVC test
2016-07-22 Howard Maoskip user-mode trap tests in rv32mi/rv64mi-p-csr if...
2016-07-22 Andrew WatermanMove rv32mi dirty bit test to rv32si
2016-07-22 Andrew WatermanMove dirty bit test to rv64si directory
2016-07-22 Andrew WatermanSimplify fence.i test for RVC
2016-07-22 Andrew WatermanMake ma_fetch test robust against code size changes
2016-07-19 Andrew WatermanDefault to XLEN=64 when building in-place
2016-07-12 Palmer DabbeltAdd a "--with-xlen" configure argument (#16)
2016-07-12 Andrew WatermanMerge rv32ua tests into rv64ua
2016-07-12 Andrew WatermanRemove instruction width assumptions to support RVC
2016-07-12 Andrew WatermanRemove vestigial j instruction test; improve jal test
2016-07-08 Andrew WatermanUpdate WFI test for priv v1.9
2016-07-06 Andrew WatermanUpdate to new PTE format
2016-06-23 Andrew WatermanMark RV32 tests as such
2016-06-22 Howard Maoseparate ua and um tests from ui tests
2016-06-22 Howard Maosplit up rv64uf and rv64ud isa tests
2016-06-18 Andrew WatermanFix breakpoint test when only one breakpoint present
2016-06-15 Sebastian Bøerv32ui: sh: Added side effect test (#14)
2016-06-10 Andrew WatermanTest more than one breakpoint at a time, if present
2016-06-10 Andrew WatermanUpdate breakpoint spec