From e38b55f9b10204171b74343a5a73d041b7186caf Mon Sep 17 00:00:00 2001
From: Andrew Waterman <waterman@cs.berkeley.edu>
Date: Mon, 2 May 2016 14:29:41 -0700
Subject: [PATCH 1/1] Stop using tohost/fromhost registers

---
 benchmarks/common/syscalls.c | 14 +++++++++++---
 env                          |  2 +-
 isa/rv64mi/dirty.S           | 10 ++++++++--
 isa/rv64mi/mcsr.S            |  7 +++++++
 4 files changed, 27 insertions(+), 6 deletions(-)

diff --git a/benchmarks/common/syscalls.c b/benchmarks/common/syscalls.c
index 4620631..9c72e36 100644
--- a/benchmarks/common/syscalls.c
+++ b/benchmarks/common/syscalls.c
@@ -14,6 +14,9 @@
 // initialized in crt.S
 int have_vec;
 
+volatile uint64_t tohost __attribute__((aligned(64)));
+volatile uint64_t fromhost __attribute__((aligned(64)));
+
 static long handle_frontend_syscall(long which, long arg0, long arg1, long arg2)
 {
   volatile uint64_t magic_mem[8] __attribute__((aligned(64)));
@@ -22,8 +25,13 @@ static long handle_frontend_syscall(long which, long arg0, long arg1, long arg2)
   magic_mem[2] = arg1;
   magic_mem[3] = arg2;
   __sync_synchronize();
-  write_csr(mtohost, (long)magic_mem);
-  while (swap_csr(mfromhost, 0) == 0);
+
+  tohost = (uintptr_t)magic_mem;
+  while (fromhost == 0)
+    ;
+  fromhost = 0;
+
+  __sync_synchronize();
   return magic_mem[0];
 }
 
@@ -57,7 +65,7 @@ static int handle_stats(int enable)
 
 void tohost_exit(long code)
 {
-  write_csr(mtohost, (code << 1) | 1);
+  tohost = (code << 1) | 1;
   while (1);
 }
 
diff --git a/env b/env
index 3d45ca3..b54a6f8 160000
--- a/env
+++ b/env
@@ -1 +1 @@
-Subproject commit 3d45ca302dbf5ac22cfac8fb025c05c735c35e26
+Subproject commit b54a6f8e11f43ac6df310016723ef6eb2f7d3a33
diff --git a/isa/rv64mi/dirty.S b/isa/rv64mi/dirty.S
index 5228129..9de358b 100644
--- a/isa/rv64mi/dirty.S
+++ b/isa/rv64mi/dirty.S
@@ -76,11 +76,17 @@ stvec_handler:
 die:
   RVTEST_FAIL
 
-.data
+RVTEST_CODE_END
+
+  .data
+RVTEST_DATA_BEGIN
+
+  TEST_DATA
+
 .align 12
 page_table_1: .dword (DRAM_BASE/RISCV_PGSIZE << PTE_PPN_SHIFT) | PTE_V | PTE_TYPE_URX_SRX
 dummy: .dword 0
 .align 12
 page_table_2: .dword (DRAM_BASE/RISCV_PGSIZE << PTE_PPN_SHIFT) | PTE_V | PTE_TYPE_URWX_SRWX
 
-RVTEST_CODE_END
+RVTEST_DATA_END
diff --git a/isa/rv64mi/mcsr.S b/isa/rv64mi/mcsr.S
index f704827..b66611c 100644
--- a/isa/rv64mi/mcsr.S
+++ b/isa/rv64mi/mcsr.S
@@ -36,3 +36,10 @@ RVTEST_CODE_BEGIN
   TEST_PASSFAIL
 
 RVTEST_CODE_END
+
+  .data
+RVTEST_DATA_BEGIN
+
+  TEST_DATA
+
+RVTEST_DATA_END
-- 
2.30.2