riscv-tests.git
2015-02-07 Palmer DabbeltChange submodule pointers to github.com/riscv
2015-01-27 Andrew WatermanFix matmul performance on gcc 4.9
2015-01-10 Andrew WatermanAdd LICENSE
2015-01-05 Andrew WatermanAvoid deprecated "b" pseudo-op; use "j" instead
2015-01-03 Andrew WatermanOn misaligned fetch, EPC = branch target, not source
2014-12-18 Henry Cookminor mt updates
2014-12-16 Andrew WatermanRemove dependence on machine/syscall.h
2014-12-13 Andrew WatermanInitialize static TLS for the benchmarks
2014-12-13 Andrew WatermanAdd more entropy to matrix multiplication input
2014-12-13 Andrew WatermanUse user stack in supervisor mode
2014-12-04 Andrew WatermanUse new toolchain and calling convention
2014-12-04 Andrew WatermanRely on assembler to relax far branches
2014-12-04 Andrew WatermanMake timer test more thorough
2014-11-22 Yunsup Leepush env
2014-11-22 Yunsup Leerelax rv32si timer test a bit
2014-11-13 Yunsup Leeremove zscale specific tests
2014-11-13 Yunsup Leeenable make subsets
2014-11-13 Yunsup Leemake rv32si fault load/store test stronger
2014-11-13 Yunsup Leebeef up rv32si tests
2014-11-12 Henry Cookblocked mt-matmul
2014-11-08 Henry Cookforgot barrier in mt-matmul
2014-11-08 Henry CookClean up canonical mt benchmarks and reorganize extra...
2014-11-07 Andrew WatermanFix build with riscv-gcc version 4.9
2014-11-07 Andrew WatermanDon't access memory outside of the binary's range
2014-11-07 Andrew WatermanFix TLS in benchmarks
2014-10-24 Yunsup Leepush env
2014-09-25 Henry CookUpdated mt tests
2014-09-10 Christopher... Enable interrupts in bmarks
2014-08-28 Christopher... Added "simple" test to rv32ui.
2014-08-07 Yunsup Leeupdates
2014-08-07 Yunsup Leeupdate readme
2014-08-06 Yunsup Leeupdate readme
2014-08-05 Sagar Karandikarcleanup README.md for web
2014-07-30 Sagar Karandikarprep-for-public: change to https ref for env
2014-05-08 Andrew WatermanAdd timer interrupt test
2014-04-18 Christopher... Added a new test case to REMW.
2014-04-15 Yunsup Leecommit high-performance mm (scalar and vector versions)
2014-04-09 Stephen TwiggAdjust hwacha misaligned instruction test to ignore...
2014-04-07 Stephen TwiggResync env with riscv-opcodes
2014-04-07 Andrew WatermanAdd radix sort benchmark
2014-04-03 Stephen TwiggsetStats in benchmarks now should set and unset the...
2014-04-03 Stephen TwiggSync env with opcodes
2014-03-26 Andrew WatermanMake qsort input size more reasonable
2014-03-26 Andrew WatermanMake qsort benchmark more meaningful
2014-03-18 Andrew WatermanCheck FP corner cases and flags
2014-03-07 Andrew WatermanAdd fclass.{s|d} test
2014-03-04 Yunsup Leeupdate env
2014-03-02 Yunsup Leepush env
2014-03-02 Yunsup Leeadd vfmsv.{s,d} tests
2014-02-28 Yunsup Leepush env
2014-02-28 Yunsup Leeadd keepcfg test
2014-02-27 Yunsup Leetest to see whether vector unit is able to take 2 fmas...
2014-02-25 Yunsup Leepush env
2014-02-23 Eric LoveSort fixes: support for repeated trials.
2014-02-20 Eric LoveMerge commit '0661b47765081c710af3df66ec698aa58ff14d5d'
2014-02-20 Eric LoveAdded TAV sort benchmarks
2014-02-12 Andrew WatermanRun benchmarks in user mode
2014-02-11 Adam IzraelevitzMerge branch 'master' of github.com:ucb-bar/riscv-tests
2014-02-11 Adam IzraelevitzUpdated README to recursively initialize repos
2014-02-11 Andrew WatermanRevert to old AUIPC definition
2014-02-06 Scott Beamerwith env as a submodule, now have to populate it
2014-02-06 Yunsup Leefix recursive interrupts, and more improvements to...
2014-02-06 Andrew WatermanImprove VM trap entry code
2014-02-06 Andrew WatermanClean up benchmarks; support uarch-specific counters
2014-02-06 Yunsup Leepush env
2014-02-05 Quan NguyenAdd Stephen's vector FFT code
2014-02-04 Quan NguyenAdd vfmsv instruction test, change vsetprec to vsetucfg
2014-02-01 Andrew WatermanShrink hex dumps
2014-02-01 Andrew WatermanAdd rv32si tests, including illegality of shamt[5]
2014-02-01 Henry CookMinor Makefile improvements
2014-01-31 Andrew WatermanMake CSR test much more robust
2014-01-31 Andrew WatermanReference TESTNUM instead of x28 directly
2014-01-24 Eric LoveDone with rv32ui asm test ports
2014-01-24 Eric LoveFixed srl, srli
2014-01-24 Eric Lovesrl and srai
2014-01-23 Eric LoveFirst round of rv32ui asm tests
2014-01-22 Andrew WatermanAdd CSRRx/CSRRxI test
2014-01-21 Quan NguyenAdd packed vvadd test for confprec Hwacha
2014-01-21 Quan NguyenPush env
2014-01-16 Andrew WatermanMake LR/SC test more thorough
2014-01-14 Andrew WatermanUpdate v env
2013-11-29 Albert OuFix load offsets for the vvadd_fw test
2013-11-25 Andrew WatermanUpdate benchmarks to new privileged ISA
2013-11-24 Andrew WatermanUpdate to new privileged ISA
2013-11-20 Quan NguyenAdd rv64uv-p-amoxor_{w,d} tests
2013-11-20 Yunsup Leefix rv64uv/vvadd_fd test to correctly check results
2013-11-14 Yunsup Leeadded riscv-test-env as a submodule
2013-11-14 Yunsup Leesplit out envs from riscv-tests
2013-11-06 Yunsup Leeadd accelerator disabled cause
2013-11-06 Yunsup Leecorrectly set SR_EA bit for all vector physical supervi...
2013-11-06 Yunsup Leecorrectly set SR_EA bit for all vector physical tests
2013-10-19 Yunsup Leerevamp pt tests as well
2013-10-19 Yunsup Leehwacha virtual tests working
2013-10-18 Yunsup Leeadd hwacha exception support
2013-10-17 Yunsup Leedisable vector bank tests
2013-10-17 Yunsup Leeadd passing physical vector tests back in
2013-10-17 Yunsup Leeupdate out-of-date floating-point test in rv64uv
2013-10-17 Yunsup Leefix broken amoor_w rv64uv test
2013-10-10 Christopher... Merge branch 'master' of github.com:ucb-bar/riscv-tests
2013-10-10 Christopher... Benchmarks now run in user-mode.
next