add Makefile for verilog compilation
[rv32.git] / vga.v
1 /*
2 * Copyright 2018 Jacob Lifshay
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a copy
5 * of this software and associated documentation files (the "Software"), to deal
6 * in the Software without restriction, including without limitation the rights
7 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
8 * copies of the Software, and to permit persons to whom the Software is
9 * furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in all
12 * copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
17 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
19 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
20 * SOFTWARE.
21 *
22 */
23 `timescale 1ns / 100ps
24
25 module vga(
26 input clk,
27 output [7:0] vga_r,
28 output [7:0] vga_g,
29 output [7:0] vga_b,
30 output vga_hsync,
31 output vga_vsync,
32 output vga_blank,
33 output vga_pixel_clock,
34 input tty_write,
35 input [7:0] tty_data,
36 output tty_busy
37 );
38
39 wire pixel_clock;
40
41 vga_clock_generator clock_generator(clk, pixel_clock);
42
43 wire location_generator_hsync;
44 wire location_generator_vsync;
45 wire location_generator_blank;
46 wire [15:0] location_generator_x;
47 wire [15:0] location_generator_y;
48 wire location_generator_xy_in_active;
49
50 vga_location_generator location_generator(pixel_clock,
51 location_generator_hsync,
52 location_generator_vsync,
53 location_generator_blank,
54 location_generator_x,
55 location_generator_y,
56 location_generator_xy_in_active);
57
58 wire [7:0] text_buffer_screen_char;
59 reg text_buffer_hsync;
60 reg text_buffer_vsync;
61 reg text_buffer_blank;
62 reg [15:0] text_buffer_x;
63 reg [15:0] text_buffer_y;
64 reg text_buffer_xy_in_active;
65
66 initial text_buffer_hsync = 0;
67 initial text_buffer_vsync = 0;
68 initial text_buffer_blank = 0;
69 initial text_buffer_x = 0;
70 initial text_buffer_y = 0;
71 initial text_buffer_xy_in_active = 0;
72
73 always @(posedge pixel_clock) text_buffer_hsync <= location_generator_hsync;
74 always @(posedge pixel_clock) text_buffer_vsync <= location_generator_vsync;
75 always @(posedge pixel_clock) text_buffer_blank <= location_generator_blank;
76 always @(posedge pixel_clock) text_buffer_x <= location_generator_x;
77 always @(posedge pixel_clock) text_buffer_y <= location_generator_y;
78 always @(posedge pixel_clock) text_buffer_xy_in_active <= location_generator_xy_in_active;
79
80 vga_text_buffer text_buffer(pixel_clock,
81 location_generator_x,
82 location_generator_y,
83 location_generator_xy_in_active,
84 text_buffer_screen_char,
85 clk,
86 tty_write,
87 tty_data,
88 tty_busy);
89
90 wire [7:0] font_generator_r;
91 wire [7:0] font_generator_g;
92 wire [7:0] font_generator_b;
93
94 vga_font_generator font_generator(
95 pixel_clock,
96 text_buffer_x,
97 text_buffer_y,
98 text_buffer_xy_in_active,
99 text_buffer_screen_char,
100 font_generator_r,
101 font_generator_g,
102 font_generator_b);
103
104 reg font_generator_hsync;
105 reg font_generator_vsync;
106 reg font_generator_blank;
107
108 initial font_generator_hsync = 0;
109 initial font_generator_vsync = 0;
110 initial font_generator_blank = 0;
111
112 always @(posedge pixel_clock) font_generator_hsync <= text_buffer_hsync;
113 always @(posedge pixel_clock) font_generator_vsync <= text_buffer_vsync;
114 always @(posedge pixel_clock) font_generator_blank <= text_buffer_blank;
115
116 assign vga_pixel_clock = ~pixel_clock;
117
118 reg output_hsync;
119 reg output_vsync;
120 reg output_blank;
121 reg [7:0] output_r;
122 reg [7:0] output_g;
123 reg [7:0] output_b;
124
125 initial output_hsync = 0;
126 initial output_vsync = 0;
127 initial output_blank = 0;
128 initial output_r = 0;
129 initial output_g = 0;
130 initial output_b = 0;
131
132 always @(posedge pixel_clock) output_hsync = font_generator_hsync;
133 always @(posedge pixel_clock) output_vsync = font_generator_vsync;
134 always @(posedge pixel_clock) output_blank = font_generator_blank;
135 always @(posedge pixel_clock) output_r = font_generator_r;
136 always @(posedge pixel_clock) output_g = font_generator_g;
137 always @(posedge pixel_clock) output_b = font_generator_b;
138
139 assign vga_r = output_r;
140 assign vga_g = output_g;
141 assign vga_b = output_b;
142
143 reg final_hsync;
144 reg final_vsync;
145 reg final_blank;
146
147 initial final_hsync = 0;
148 initial final_vsync = 0;
149 initial final_blank = 0;
150
151 always @(posedge pixel_clock) final_hsync = output_hsync;
152 always @(posedge pixel_clock) final_vsync = output_vsync;
153 always @(posedge pixel_clock) final_blank = font_generator_blank;
154
155 assign vga_hsync = final_hsync;
156 assign vga_vsync = final_vsync;
157 assign vga_blank = font_generator_blank;
158 endmodule