import soc not SoC
[shakti-core.git] / src / lib / MemoryMap.bsv
1 /*
2 Copyright (c) 2013, IIT Madras
3 All rights reserved.
4
5 Redistribution and use in source and binary forms, with or without
6 modification, are permitted provided that the following conditions
7 are met:
8
9 * Redistributions of source code must retain the above copyright notice,
10 this list of conditions and the following disclaimer.
11 * Redistributions in binary form must reproduce the above copyright
12 notice, this list of conditions and the following disclaimer in the
13 documentation and/or other materials provided with the distribution.
14 * Neither the name of IIT Madras nor the names of its contributors
15 may be used to endorse or promote products derived from this software
16 without specific prior written permission.
17
18 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
19 "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
20 LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
21 A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
22 HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
23 SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
24 TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
25 PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
26 LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
27 NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
28 SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29 ---------------------------------------------------------------------
30 */
31 package MemoryMap;
32 /*=== Project imports ==== */
33 import defined_types::*;
34 import soc::*;
35 import slow_peripherals::*;
36 `include "instance_defines.bsv"
37 `include "core_parameters.bsv"
38 /*========================= */
39
40
41 function Tuple2 #(Bool, Bit#(TLog#(Num_Slaves)))
42 fn_addr_to_slave_num (Bit#(`PADDR) addr);
43
44 let ft = FastTuple2;
45 Bool isfast = tpl_1(ft);
46 Bit#(TLog#(Num_Slaves)) x = tpl_2(ft);
47
48 let st = SlowTuple2;
49 Bool isslow = tpl_1(st);
50 Bit#(TLog#(Num_Slow_Slaves)) y = tpl_2(st);
51 if (isfast)
52 return tuple2(isfast, x);
53 else if (isslow)
54 return tuple2(True,fromInteger(valueOf(SlowPeripheral_slave_num)));
55 else
56 return tuple2(False,?);
57
58 endfunction
59
60 function Bool is_IO_Addr(Bit#(`PADDR) addr); // TODO Shuold be PADDR
61 if(addr>=`DebugBase && addr<=`DebugEnd)
62 return (True);
63 else if(addr>=`SDRAMMemBase && addr<=`SDRAMMemEnd)
64 `ifdef FlexBus
65 return (True);
66 `else
67 return (False);
68 `endif
69 `ifdef BOOTROM
70 else if(addr>=`BootRomBase && addr<=`BootRomEnd)
71 return (False);
72 `endif
73 `ifdef TCMemory
74 else if(addr>=`TCMBase && addr<=`TCMEnd)
75 return (False);
76 `endif
77 else
78 return True;
79 endfunction
80
81 endpackage