remove unneeded #defines

diff --git a/src/core/core_parameters.bsv b/src/core/core_parameters.bsv
index 00d476ba42930d2a4d42e4c94299a42727486134..bbb28a0d5eb140708a847ad73b523ab4e9361bb8 100644 (file)
--- a/src/core/core_parameters.bsv
+++ b/src/core/core_parameters.bsv
@@ -364,39 +364,7 @@
 `define PAGEWALK_CYCLES                                                42
 `define COREBUS_CYCLES                                         43
 
 `define PAGEWALK_CYCLES                                                42
 `define COREBUS_CYCLES                                         43
 

-///////////////////////////////////////////////////////////////////////////////////
-/*====== Define the slave number of each peripheral=== */
-//`ifdef simulate
-//     `define Sdram_slave_num                                 0 
-//     `define Sdram_cfg_slave_num             `Sdram_slave_num 
-//     `define BootRom_slave_num                       `Sdram_cfg_slave_num+1
-//     `define Uart0_slave_num                         `BootRom_slave_num+1
-//     `define Uart1_slave_num                         `Uart0_slave_num+1
-//     `define Debug_slave_num                         `Uart1_slave_num+1
-//     `define Plic_slave_num                          `Debug_slave_num+1
-//     `define Qspi0_slave_num          `Plic_slave_num 
-//     `define Qspi1_slave_num          `Qspi0_slave_num
-//     `define Num_Slaves                                      `Qspi1_slave_num
-//`else
-//     `define Uart0_slave_num           0
-//     `define Uart1_slave_num           1
-//     `define Qspi0_slave_num           2
-//     `define Qspi1_slave_num           3
-//     `define I2c0_slave_num                           4
-//     `define I2c1_slave_num            5
-//     `define Sdram_slave_num           6
-//     `define Sdram_cfg_slave_num              7
-//     `define Dma_slave_num                            8
-//     `define Hyperflash_mem_slave_num  9
-//     `define Hyperflash_reg_slave_num  10
-//     `define Debug_slave_num                         11
-//     `define AxiExp1_slave_num                       12
-//     `define GPIO_slave_num                          13
-//     `define BootRom_slave_num                       14
-//     `define PLIC_slave_num                          15
-//     `define TCM_slave_num                           16
-//`endif
-/*=================================================== */
+////////////////////////////////////////////////////////////////////////////

 
 /*===== Define the base address of each peripheral === */
        `define DebugBase               'h00000000
 
 /*===== Define the base address of each peripheral === */
        `define DebugBase               'h00000000


@@ -411,13 +379,6 @@
        `define TCMEnd                  'h00040000 // 128KB
   `define VMEBase      'h40000000      
        `define  VMEEnd  'h4FFFFFFF // 1GB
        `define TCMEnd                  'h00040000 // 128KB
   `define VMEBase      'h40000000      
        `define  VMEEnd  'h4FFFFFFF // 1GB

-    `ifdef FlexBus_verify
-        `define FlexBusBase 'h80000000
-        `define FlexBusEnd 'h8FFFFFFF
-    `else
-        `define FlexBusBase 'h50000000
-        `define FlexBusEnd 'h5FFFFFFF
-    `endif

     //`ifdef FlexBus_verify
            //`define SDRAMMemBase      'h50000000      
            //`define SDRAMMemEnd  'h5FFFFFFF // 1GB
     //`ifdef FlexBus_verify
            //`define SDRAMMemBase      'h50000000      
            //`define SDRAMMemEnd  'h5FFFFFFF // 1GB


@@ -427,30 +388,3 @@
     //`endif
        `define AxiExp1Base     'hC0000000
        `define AxiExp1End      'hFFFFFFFF
     //`endif
        `define AxiExp1Base     'hC0000000
        `define AxiExp1End      'hFFFFFFFF

-/*=================================================== */
-/*== Define the range of bytes per peripheral==== 
-`ifdef simulate
-       `define MemCRange               'h7FFFFFFF
-       `define ConfigMRange    'h3000
-       `define DebugRange              'h44  
-`else
-    `define BootRomRange       'hFFF         //4KB for Now
-        `define GPIORange                       'h8                            //2 registers for GPIO
-    `define UART0Range         'h38          //8 Registers
-    `define UART1Range         'h38          //2 registers
-    `define I2C0Range          'h38          //6 Registers. Adding +2 to just have a backup, if at all it might be required 
-    `define I2C1Range          'h38          //8 registers
-    `define DMARange           'hFF          
-    `define SDRAMCfgRange      'h58          //12 registers
-    `define QSPI0CfgRange      'h60          //13 registers
-    `define QSPI1CfgRange      'h60          //13 registers
-    `define HyperCfgRange      'h70          //15 registers
-    `define SDRAMMemRange      'hFFFFFFF     //512 MB
-    `define HyperMemRange      'hFFFFFFF     //512 MB
-        `define QSPI0MemRange      'h7FFFFFFF    //2 GB
-    `define QSPI1MemRange          'h7FFFFFFF    //2 GB
-    `define AxiExpRange                         'hFFFFFFFF    //512 MB for now!
-    `define DebugRange         'h44          //16 Registers -- 32 bit
-`endif
-       /*=================================================== */
-