From 04e33f3e51ead76f8770211491b1139765681c13 Mon Sep 17 00:00:00 2001
From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Fri, 27 Jul 2018 10:51:40 +0100
Subject: [PATCH] add ClintBase

---
 src/core/core_parameters.bsv | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/src/core/core_parameters.bsv b/src/core/core_parameters.bsv
index d4afdb0..bb5811a 100644
--- a/src/core/core_parameters.bsv
+++ b/src/core/core_parameters.bsv
@@ -409,6 +409,8 @@
 	`define SDRAMCfgEnd  'h000117FF // 12 32-bit registers
 	`define TCMBase		'h00020000 // 
 	`define TCMEnd			'h00040000 // 128KB
+    `define ClintBase       'h02000000
+    `define ClintEnd        'h020BFFFF
   `define VMEBase	'h40000000	
 	`define  VMEEnd  'h4FFFFFFF // 1GB
     `ifdef FlexBus_verify
-- 
2.30.2