src/peripherals/emmc/emmc_dummy.bsv

   1 /*
   2 Copyright (c) 2013, IIT Madras All rights reserved.
   3
   4 Redistribution and use in source and binary forms, with or without
   5 modification, are permitted provided that the following conditions
   6 are met:
   7
   8 * Redistributions of source code must retain the above copyright notice,
   9   this list of conditions and the following disclaimer.
  10 * Redistributions in binary form must reproduce the above copyright
  11   notice, this list of conditions and the following disclaimer in the
  12   documentation and/or other materials provided with the distribution.
  13 * Neither the name of IIT Madras  nor the names of its contributors
  14   may be used to endorse or promote products derived from this software
  15   without specific prior written permission.
  16
  17 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  18 "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  19 LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  20 A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  21 HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  22 SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
  23 TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
  24 PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
  25 LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
  26 NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  27 SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  28 --------------------------------------------------------------------
  29
  30 Author: Neel Gala
  31 Email id: neelgala@gmail.com
  32 Details:
  33
  34 -------------------------------------------------------------------
  35 */
  36
  37 package emmc_dummy;
  38   `define SDBUSWIDTH 8
  39   `include "instance_defines.bsv"
  40   import GetPut::*;
  41   import ClockDiv::*;
  42   import ConcatReg::*;
  43         import Semi_FIFOF::*;
  44         import BUtils ::*;
  45         import AXI4_Lite_Types::*;
  46
  47   interface Ifc_emmc_dummy;
  48           interface AXI4_Lite_Slave_IFC#(`PADDR, `DATA, `USERSPACE) slave;
  49     interface Get#(Bit#(1)) cmd;
  50     interface Get#(Bit#(1)) clk;
  51     interface Get#(Bit#(`SDBUSWIDTH)) out;
  52     interface Get#(Bit#(`SDBUSWIDTH)) out_en;
  53     interface Put#(Bit#(`SDBUSWIDTH)) in;
  54   endinterface
  55
  56   (*synthesize*)
  57   module mkemmc_dummy(Ifc_emmc_dummy);
  58                 AXI4_Lite_Slave_Xactor_IFC#(`PADDR,`DATA, `USERSPACE)
  59                 s_xactor<-mkAXI4_Lite_Slave_Xactor();
  60
  61       Reg#(Bit#(1)) rg_cmd <- mkReg(0);
  62       Reg#(Bit#(1)) rg_clk <- mkReg(0);
  63       Reg#(Bit#(`SDBUSWIDTH)) rg_out <- mkReg(0);
  64       Reg#(Bit#(`SDBUSWIDTH)) rg_out_en <- mkReg(0);
  65       Reg#(Bit#(`SDBUSWIDTH)) rg_in <- mkReg(0);
  66
  67       interface cmd = interface Get
  68         method ActionValue#(Bit#(1)) get;
  69           return rg_cmd;
  70         endmethod
  71       endinterface;
  72
  73       interface clk = interface Get
  74         method ActionValue#(Bit#(1)) get;
  75           return rg_clk;
  76         endmethod
  77       endinterface;
  78
  79       interface out_en = interface Get
  80         method ActionValue#(Bit#(`SDBUSWIDTH)) get;
  81           return rg_out_en;
  82         endmethod
  83       endinterface;
  84
  85       interface out = interface Get
  86         method ActionValue#(Bit#(`SDBUSWIDTH)) get;
  87           return rg_out;
  88         endmethod
  89       endinterface;
  90
  91       interface in = interface Put
  92         method Action put(Bit#(`SDBUSWIDTH) in);
  93           rg_in <= in;
  94         endmethod
  95       endinterface;
  96
  97     interface slave=s_xactor.axi_side;
  98
  99   endmodule
 100
 101 endpackage