add dummy clock register for now
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Thu, 2 Aug 2018 11:32:01 +0000 (12:32 +0100)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Thu, 2 Aug 2018 11:32:01 +0000 (12:32 +0100)
commit4281aa9ba88cb0aea5efef17ff324ca0ffac86fc
tree1ffb9f01a926704b65f035fd8f9792b0c6b5722a
parentdac2798fce0a2725494051e363f870b4a7cc6dc0
add dummy clock register for now
src/peripherals/sdram/sdr_top.bsv