1 // See LICENSE for license details.
2 package sifive.blocks.devices.mockaon
5 import diplomacy.LazyModule
6 import rocketchip.{TopNetwork,TopNetworkModule}
7 import uncore.tilelink2.{IntXing, TLAsyncCrossingSource, TLFragmenter}
10 trait PeripheryMockAON extends TopNetwork {
11 val mockAONConfig: MockAONConfig
12 val coreplex: CoreplexRISCVPlatform
14 // We override the clock & Reset here so that all synchronizers, etc
15 // are in the proper clock domain.
16 val aon = LazyModule(new MockAONWrapper(mockAONConfig))
17 val aon_int = LazyModule(new IntXing)
18 aon.node := TLAsyncCrossingSource()(TLFragmenter(peripheryBusConfig.beatBytes, cacheBlockBytes)(peripheryBus.node))
19 aon_int.intnode := aon.intnode
20 intBus.intnode := aon_int.intnode
23 trait PeripheryMockAONBundle {
24 val aon = new MockAONWrapperBundle()
27 trait PeripheryMockAONModule {
28 this: TopNetworkModule {
29 val outer: PeripheryMockAON
30 val io: PeripheryMockAONBundle
33 io.aon <> outer.aon.module.io
35 // Explicit clock & reset are unused in MockAONWrapper.
36 // Tie to check this assumption.
37 outer.aon.module.clock := Bool(false).asClock
38 outer.aon.module.reset := Bool(true)
40 outer.coreplex.module.io.rtcToggle := outer.aon.module.io.rtc.asUInt.toBool