src/main/scala/devices/mockaon/MockAONPeriphery.scala

   1 // See LICENSE for license details.
   2 package sifive.blocks.devices.mockaon
   3
   4 import Chisel._
   5 import config.Field
   6 import diplomacy.{LazyModule, LazyMultiIOModuleImp}
   7 import rocketchip.{HasSystemNetworks, HasCoreplexRISCVPlatform}
   8 import uncore.tilelink2.{IntXing, TLAsyncCrossingSource, TLFragmenter}
   9 import util.ResetCatchAndSync
  10
  11 case object PeripheryMockAONKey extends Field[MockAONParams]
  12
  13 trait HasPeripheryMockAON extends HasSystemNetworks with HasCoreplexRISCVPlatform {
  14   // We override the clock & Reset here so that all synchronizers, etc
  15   // are in the proper clock domain.
  16   val mockAONParams= p(PeripheryMockAONKey)
  17   val aon = LazyModule(new MockAONWrapper(peripheryBusBytes, mockAONParams))
  18   val aon_int = LazyModule(new IntXing)
  19   aon.node := TLAsyncCrossingSource()(TLFragmenter(peripheryBusBytes, cacheBlockBytes)(peripheryBus.node))
  20   aon_int.intnode := aon.intnode
  21   intBus.intnode := aon_int.intnode
  22 }
  23
  24 trait HasPeripheryMockAONBundle {
  25   val aon: MockAONWrapperBundle
  26   def coreResetCatchAndSync(core_clock: Clock) = {
  27     ResetCatchAndSync(core_clock, aon.rsts.corerst, 20)
  28   }
  29 }
  30
  31 trait HasPeripheryMockAONModuleImp extends LazyMultiIOModuleImp with HasPeripheryMockAONBundle {
  32   val outer: HasPeripheryMockAON
  33   val aon = IO(new MockAONWrapperBundle)
  34
  35   aon <> outer.aon.module.io
  36
  37   // Explicit clock & reset are unused in MockAONWrapper.
  38   // Tie  to check this assumption.
  39   outer.aon.module.clock := Bool(false).asClock
  40   outer.aon.module.reset := Bool(true)
  41
  42   outer.coreplex.module.io.rtcToggle := outer.aon.module.io.rtc.asUInt.toBool
  43
  44   outer.aon.module.io.ndreset := outer.coreplex.module.io.ndreset
  45 }