Initial commit.
[sifive-blocks.git] / vsrc / SRLatch.v
1 // See LICENSE for license details.
2 module SRLatch (
3 input set,
4 input reset,
5 output q
6 );
7
8 reg latch;
9
10 // synopsys async_set_reset "set"
11 // synopsys one_hot "set, reset"
12 always @(set or reset)
13 begin
14 if (set)
15 latch <= 1'b1;
16 else if (reset)
17 latch <= 1'b0;
18 end
19
20 assign q = latch;
21
22 endmodule