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(parent: 9c8fe44) | patch
uart: power-on with the right divider for the design (#15)
authorWesley W. Terpstra <wesley@sifive.com>
Sun, 14 May 2017 06:38:20 +0000 (23:38 -0700)
committerGitHub <noreply@github.com>
Sun, 14 May 2017 06:38:20 +0000 (23:38 -0700)
commit0f8722f80c16a649882d02f03d000da946eee737
tree4c0904205ed3f4ea2defbc72bcdc1f96e4caef9btree
parent9c8fe446704afa7f7a3478caa66b3f6b242246b3commit | diff
uart: power-on with the right divider for the design (#15)
src/main/scala/devices/uart/UART.scala diff | blob | history
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