From 6a13639cf3e64acf4a672daa0c895e4919d4a6dc Mon Sep 17 00:00:00 2001 From: Megan Wachs Date: Wed, 20 Sep 2017 16:21:21 -0700 Subject: [PATCH] SPI: Make it easier to build arbitrary bundles --- src/main/scala/devices/spi/SPIPins.scala | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/src/main/scala/devices/spi/SPIPins.scala b/src/main/scala/devices/spi/SPIPins.scala index 780e8cc..c46e90a 100644 --- a/src/main/scala/devices/spi/SPIPins.scala +++ b/src/main/scala/devices/spi/SPIPins.scala @@ -5,7 +5,7 @@ import Chisel._ import chisel3.experimental.{withClockAndReset} import sifive.blocks.devices.pinctrl.{PinCtrl, Pin} -class SPIPins[T <: Pin] (pingen: ()=> T, c: SPIParamsBase) extends SPIBundle(c) { +class SPISignals[T <: Data] (pingen: ()=> T, c: SPIParamsBase) extends SPIBundle(c) { val sck = pingen() val dq = Vec(4, pingen()) @@ -14,6 +14,13 @@ class SPIPins[T <: Pin] (pingen: ()=> T, c: SPIParamsBase) extends SPIBundle(c) override def cloneType: this.type = this.getClass.getConstructors.head.newInstance(pingen, c).asInstanceOf[this.type] +} + +class SPIPins[T <: Pin] (pingen: ()=> T, c: SPIParamsBase) extends SPISignals(pingen, c) { + + override def cloneType: this.type = + this.getClass.getConstructors.head.newInstance(pingen, c).asInstanceOf[this.type] + def fromPort(spi: SPIPortIO, clock: Clock, reset: Bool, syncStages: Int = 0, driveStrength: Bool = Bool(false)) { -- 2.30.2