ls180/experiment9_recon/Makefile

   1 ifeq ($(SIM),)
   2   $(error Use one of the run_*.sh scripts to run cocotb test bench)
   3 endif
   4
   5 TOPLEVEL_LANG := verilog
   6
   7 # within soc repo, as submodule, this works after "make ls180"
   8 # is run inside the litex/florent subdirectory
   9 VERILOG_SOURCES := \
  10   ../spblock_512w64b8w.v \
  11   ../pll.v \
  12   full_core_4_4ksram_libresoc_recon.v \
  13   full_core_4_4ksram_litex_ls180_recon.v \
  14 # END VERILOG_SOURCES
  15
  16 MODULE := test
  17
  18 include $(shell cocotb-config --makefiles)/Makefile.sim