use git submodule soclayout for source files, rather than
[soc-cocotb-sim.git] / ls180 / pre_pnr / test.py
2021-04-16 Luke Kenneth Casso... get pre-coriolis2 verilator (wishbone) functional
2021-04-13 Luke Kenneth Casso... resolving pin names (to litex ls180)
2021-04-06 Luke Kenneth Casso... remove wb test from test.py
2021-04-06 Staf VerhaegenFunction is a generator.
2021-04-06 Luke Kenneth Casso... add comments
2021-04-06 Luke Kenneth Casso... fix wishbone jtag test to run: results not correct yet
2021-04-06 Luke Kenneth Casso... add first cut at wishbone jtag unit test
2021-04-06 Luke Kenneth Casso... whitespace
2021-04-04 Luke Kenneth Casso... 80 char linewrap
2021-04-04 Staf VerhaegenTest different combinations of i, o, oe for InTriOut
2021-04-03 Staf VerhaegenSupport running tb on test_issuer subblock.
2021-04-02 Staf VerhaegenFull boundary scan.
2021-04-02 Staf VerhaegenTypo.
2021-04-02 Staf VerhaegenAdd helper class JTAGPin
2021-04-02 Staf VerhaegenFirst version of boundary scan test bench.
2021-04-02 Staf Verhaegenpre_pnr/test.py: Fix idcode SVF test name.
2021-04-02 Staf Verhaegenpre_pnr/test.py: Reset JTAG before executing SVF.
2021-04-01 Luke Kenneth Casso... TWI enabled in boundary scan
2021-04-01 Luke Kenneth Casso... show how to get the boundary scan information from...
2021-04-01 Luke Kenneth Casso... move pre_pnr cocotb sim to soc-cocotb-sim directory