src/soc/decoder/isa/fixedlogical.patch

   1 --- fixedlogical.py.orig        2020-05-14 11:04:21.871367557 -0400
   2 +++ fixedlogical.py     2020-05-14 11:04:28.714770484 -0400
   3 @@ -188,7 +188,7 @@
   4          return (RA,)
   5
   6      @inject()
   7 -    def op_cmpb(self, RB, RA):
   8 +    def op_cmpb(self, RB, RS, RA):
   9          for n in range(0, 7 + 1):
  10              if eq(RS[8 * n:8 * n + 7 + 1], RB[8 * n:8 * n + 7 + 1]):
  11                  RA[8 * n:8 * n + 7 + 1] = concat(1, repeat=8)
  12 @@ -493,7 +493,7 @@
  13                  form='X',
  14                  asmregs=[['RA', 'RS'], '(Rc=1)'])
  15      fixedlogical_instrs['cmpb'] = instruction_info(func=op_cmpb,
  16 -                read_regs=OrderedSet(['RB']),
  17 +                read_regs=OrderedSet(['RB', 'RS']),
  18                  uninit_regs=OrderedSet(['RA']), write_regs=OrderedSet(['RA']),
  19                  special_regs=OrderedSet(), op_fields=OrderedSet(),
  20                  form='X',