1 # SPDX-License: LGPLv3+
2 # Copyright (C) 2020, 2021 Luke Kenneth Casson Leighton <lkcl@lkcl.net>
3 # Copyright (C) 2020, Michael Nolan
5 """Enums used in OpenPOWER ISA decoding
7 Note: for SV, from v3.1B p12:
9 The designated SPR sandbox consists of non-privileged SPRs 704-719 and
10 privileged SPRs 720-735.
13 from enum
import Enum
, unique
16 from os
.path
import dirname
, join
17 from collections
import namedtuple
21 filedir
= os
.path
.dirname(os
.path
.abspath(__file__
))
22 basedir
= dirname(dirname(dirname(filedir
)))
23 tabledir
= join(basedir
, 'libreriscv')
24 tabledir
= join(tabledir
, 'openpower')
25 return join(tabledir
, 'isatables')
27 def find_wiki_file(name
):
28 filedir
= os
.path
.dirname(os
.path
.abspath(__file__
))
29 basedir
= dirname(dirname(dirname(filedir
)))
30 tabledir
= join(basedir
, 'libreriscv')
31 tabledir
= join(tabledir
, 'openpower')
32 tabledir
= join(tabledir
, 'isatables')
34 return join(find_wiki_dir(), name
)
38 file_path
= find_wiki_file(name
)
39 with
open(file_path
, 'r') as csvfile
:
40 reader
= csv
.DictReader(csvfile
)
44 # names of the fields in the tables that don't correspond to an enum
45 single_bit_flags
= ['inv A', 'inv out',
46 'cry out', 'BR', 'sgn ext', 'rsrv', '32b',
47 'sgn', 'lk', 'sgl pipe']
49 # default values for fields in the table
50 default_values
= {'unit': "NONE", 'internal op': "OP_ILLEGAL",
51 'in1': "RA", 'in2': 'NONE', 'in3': 'NONE', 'out': 'NONE',
55 'rc': 'NONE', 'cry in': 'ZERO', 'form': 'NONE'}
58 def get_signal_name(name
):
61 return name
.lower().replace(' ', '_')
63 # this corresponds to which Function Unit (pipeline-with-Reservation-Stations)
64 # is to process and guard the operation. they are roughly divided by having
65 # the same register input/output signature (X-Form, etc.)
80 SV
= 1 << 12 # Simple-V https://libre-soc.org/openpower/sv
115 # Simple-V svp64 fields https://libre-soc.org/openpower/sv/svp64/
136 Idx_1_2
= 5 # due to weird BA/BB for crops
138 # supported instructions: make sure to keep up-to-date with CSV files
139 # just like everything else
141 "NONE", "add", "addc", "addco", "adde", "addeo", "addi", "addic", "addic.",
142 "addis", "addme", "addmeo", "addo", "addze", "addzeo", "and", "andc",
143 "andi.", "andis.", "attn", "b", "bc", "bcctr", "bclr", "bctar",
144 "bpermd", "cmp", "cmpb", "cmpeqb", "cmpi", "cmpl", "cmpli", "cmprb",
145 "cntlzd", "cntlzw", "cnttzd", "cnttzw", "crand", "crandc", "creqv",
146 "crnand", "crnor", "cror", "crorc", "crxor", "darn", "dcbf", "dcbst",
147 "dcbt", "dcbtst", "dcbz", "divd", "divde", "divdeo", "divdeu",
148 "divdeuo", "divdo", "divdu", "divduo", "divw", "divwe", "divweo",
149 "divweu", "divweuo", "divwo", "divwu", "divwuo", "eqv", "extsb",
150 "extsh", "extsw", "extswsli", "hrfid", "icbi", "icbt", "isel", "isync",
151 "lbarx", "lbz", "lbzu", "lbzux", "lbzx", "ld", "ldarx", "ldbrx",
152 "ldu", "ldux", "ldx", "lha", "lharx", "lhau", "lhaux", "lhax",
153 "lhbrx", "lhz", "lhzu", "lhzux", "lhzx", "lwa", "lwarx", "lwaux",
154 "lwax", "lwbrx", "lwz", "lwzcix", "lwzu", "lwzux", "lwzx", "mcrf", "mcrxr",
155 "mcrxrx", "mfcr/mfocrf", "mfmsr", "mfspr", "modsd", "modsw", "modud",
156 "moduw", "mtcrf/mtocrf", "mtmsr", "mtmsrd", "mtspr", "mulhd", "mulhdu",
157 "mulhw", "mulhwu", "mulld", "mulldo", "mulli", "mullw", "mullwo",
158 "nand", "neg", "nego", "nop", "nor", "or", "orc", "ori", "oris",
159 "popcntb", "popcntd", "popcntw", "prtyd", "prtyw", "rfid", "rldcl",
160 "rldcr", "rldic", "rldicl", "rldicr", "rldimi", "rlwimi", "rlwinm",
162 "setvl", # https://libre-soc.org/openpower/sv/setvl
163 "sim_cfg", "slbia", "sld", "slw", "srad", "sradi", "sraw",
164 "srawi", "srd", "srw", "stb", "stbcix", "stbcx", "stbu", "stbux", "stbx",
165 "std", "stdbrx", "stdcx", "stdu", "stdux", "stdx", "sth", "sthbrx", "sthcx",
166 "sthu", "sthux", "sthx", "stw", "stwbrx", "stwcx", "stwu", "stwux",
167 "stwx", "subf", "subfc", "subfco", "subfe", "subfeo", "subfic",
168 "subfme", "subfmeo", "subfo", "subfze", "subfzeo", "sync", "td",
169 "tdi", "tlbie", "tlbiel", "tw", "twi", "xor", "xori", "xoris",
172 # two-way lookup of instruction-to-index and vice-versa
175 for i
, insn
in enumerate(_insns
):
179 # Internal Operation numbering. Add new opcodes here (FPADD, FPMUL etc.)
182 OP_ILLEGAL
= 0 # important that this is zero (see power_decoder.py)
263 RS
= 4 # for some ALU/Logical operations
281 RS
= 13 # for shiftrot (M-Form)
288 RB
= 2 # for shiftrot (M-Form)
309 class LDSTMode(Enum
):
344 class CROutSel(Enum
):
353 # SPRs - Special-Purpose Registers. See V3.0B Figure 18 p971 and
354 # http://libre-riscv.org/openpower/isatables/sprs.csv
355 # http://bugs.libre-riscv.org/show_bug.cgi?id=261
357 spr_csv
= get_csv("sprs.csv")
358 spr_info
= namedtuple('spr_info', 'SPR priv_mtspr priv_mfspr length idx')
362 info
= spr_info(SPR
=row
['SPR'], priv_mtspr
=row
['priv_mtspr'],
363 priv_mfspr
=row
['priv_mfspr'], length
=int(row
['len']),
365 spr_dict
[int(row
['Idx'])] = info
366 spr_byname
[row
['SPR']] = info
367 fields
= [(row
['SPR'], int(row
['Idx'])) for row
in spr_csv
]
368 SPR
= Enum('SPR', fields
)
379 if __name__
== '__main__':
380 # find out what the heck is in SPR enum :)
381 print("sprs", len(SPR
))
384 print(SPR
.__members
__['TAR'])
386 print(x
, x
.value
, str(x
), x
.name
)
388 print ("function", Function
.ALU
.name
)