src/soc/decoder/power_enums.py

   1 from enum import Enum, unique
   2 import csv
   3 import os
   4 from os.path import dirname, join
   5 from collections import namedtuple
   6
   7 def find_wiki_file(name):
   8     filedir = os.path.dirname(os.path.abspath(__file__))
   9     basedir = dirname(dirname(dirname(filedir)))
  10     tabledir = join(basedir, 'libreriscv')
  11     tabledir = join(tabledir, 'openpower')
  12     tabledir = join(tabledir, 'isatables')
  13
  14     file_path = join(tabledir, name)
  15     return file_path
  16
  17
  18 def get_csv(name):
  19     file_path = find_wiki_file(name)
  20     with open(file_path, 'r') as csvfile:
  21         reader = csv.DictReader(csvfile)
  22         return list(reader)
  23
  24
  25 # names of the fields in the tables that don't correspond to an enum
  26 single_bit_flags = ['inv A', 'inv out',
  27                     'cry out', 'BR', 'sgn ext', 'upd', 'rsrv', '32b',
  28                     'sgn', 'lk', 'sgl pipe']
  29
  30 # default values for fields in the table
  31 default_values = {'unit': "NONE", 'internal op': "OP_ILLEGAL",
  32                   'in1': "RA", 'in2': 'NONE', 'in3': 'NONE', 'out': 'NONE',
  33                   'CR in': 'NONE',
  34                   'ldst len': 'NONE',
  35                   'rc': 'NONE', 'cry in': 'ZERO', 'form': 'NONE'}
  36
  37
  38 def get_signal_name(name):
  39     if name[0].isdigit():
  40         name = "is_" + name
  41     return name.lower().replace(' ', '_')
  42
  43 # this corresponds to which Function Unit (pipeline-with-Reservation-Stations)
  44 # is to process and guard the operation.  they are roughly divided by having
  45 # the same register input/output signature (X-Form, etc.)
  46 @unique
  47 class Function(Enum):
  48     NONE = 0
  49     ALU = 1
  50     LDST = 2
  51     SHIFT_ROT = 3
  52     LOGICAL = 4
  53     BRANCH = 5
  54     CR = 6
  55     TRAP = 7
  56     MUL = 8
  57     DIV = 9
  58
  59
  60 @unique
  61 class Form(Enum):
  62     NONE = 0
  63     I = 1
  64     B = 2
  65     SC = 3
  66     D = 4
  67     DS = 5
  68     DQ = 6
  69     DX = 7
  70     X = 8
  71     XL = 9
  72     XFX = 10
  73     XFL = 11
  74     XX1 = 12
  75     XX2 = 13
  76     XX3 = 14
  77     XX4 = 15
  78     XS = 16
  79     XO = 17
  80     A = 18
  81     M = 19
  82     MD = 20
  83     MDS = 21
  84     VA = 22
  85     VC = 23
  86     VX = 24
  87     EVX = 25
  88     EVS = 26
  89     Z22 = 27
  90     Z23 = 28
  91
  92
  93 # Internal Operation numbering.  Add new opcodes here (FPADD, FPMUL etc.)
  94 @unique
  95 class InternalOp(Enum):
  96     OP_ILLEGAL = 0     # important that this is zero (see power_decoder.py)
  97     OP_NOP = 1
  98     OP_ADD = 2
  99     OP_ADDPCIS = 3
 100     OP_AND = 4
 101     OP_ATTN = 5
 102     OP_B = 6
 103     OP_BC = 7
 104     OP_BCREG = 8
 105     OP_BPERM = 9
 106     OP_CMP = 10
 107     OP_CMPB = 11
 108     OP_CMPEQB = 12
 109     OP_CMPRB = 13
 110     OP_CNTZ = 14
 111     OP_CRAND = 15
 112     OP_CRANDC = 16
 113     OP_CREQV = 17
 114     OP_CRNAND = 18
 115     OP_CRNOR = 19
 116     OP_CROR = 20
 117     OP_CRORC = 21
 118     OP_CRXOR = 22
 119     OP_DARN = 23
 120     OP_DCBF = 24
 121     OP_DCBST = 25
 122     OP_DCBT = 26
 123     OP_DCBTST = 27
 124     OP_DCBZ = 28
 125     OP_DIV = 29
 126     OP_DIVE = 30
 127     OP_EXTS = 31
 128     OP_EXTSWSLI = 32
 129     OP_ICBI = 33
 130     OP_ICBT = 34
 131     OP_ISEL = 35
 132     OP_ISYNC = 36
 133     OP_LOAD = 37
 134     OP_STORE = 38
 135     OP_MADDHD = 39
 136     OP_MADDHDU = 40
 137     OP_MADDLD = 41
 138     OP_MCRF = 42
 139     OP_MCRXR = 43
 140     OP_MCRXRX = 44
 141     OP_MFCR = 45
 142     OP_MFSPR = 46
 143     OP_MOD = 47
 144     OP_MTCRF = 48
 145     OP_MTSPR = 49
 146     OP_MUL_L64 = 50
 147     OP_MUL_H64 = 51
 148     OP_MUL_H32 = 52
 149     OP_OR = 53
 150     OP_POPCNT = 54
 151     OP_PRTY = 55
 152     OP_RLC = 56
 153     OP_RLCL = 57
 154     OP_RLCR = 58
 155     OP_SETB = 59
 156     OP_SHL = 60
 157     OP_SHR = 61
 158     OP_SYNC = 62
 159     OP_TRAP = 63
 160     OP_XOR = 67
 161     OP_SIM_CONFIG = 68
 162     OP_CROP = 69
 163     OP_RFID = 70
 164
 165
 166 @unique
 167 class In1Sel(Enum):
 168     NONE = 0
 169     RA = 1
 170     RA_OR_ZERO = 2
 171     SPR = 3
 172
 173
 174 @unique
 175 class In2Sel(Enum):
 176     NONE = 0
 177     RB = 1
 178     CONST_UI = 2
 179     CONST_SI = 3
 180     CONST_UI_HI = 4
 181     CONST_SI_HI = 5
 182     CONST_LI = 6
 183     CONST_BD = 7
 184     CONST_DS = 8
 185     CONST_M1 = 9
 186     CONST_SH = 10
 187     CONST_SH32 = 11
 188     SPR = 12
 189
 190
 191 @unique
 192 class In3Sel(Enum):
 193     NONE = 0
 194     RS = 1
 195
 196
 197 @unique
 198 class OutSel(Enum):
 199     NONE = 0
 200     RT = 1
 201     RA = 2
 202     SPR = 3
 203
 204
 205 @unique
 206 class LdstLen(Enum):
 207     NONE = 0
 208     is1B = 1
 209     is2B = 2
 210     is4B = 3
 211     is8B = 4
 212
 213
 214 @unique
 215 class RC(Enum):
 216     NONE = 0
 217     ONE = 1
 218     RC = 2
 219
 220
 221 @unique
 222 class CryIn(Enum):
 223     ZERO = 0
 224     ONE = 1
 225     CA = 2
 226
 227 @unique
 228 class CRInSel(Enum):
 229     NONE = 0
 230     CR0 = 1
 231     BI = 2
 232     BFA = 3
 233     BA_BB = 4
 234     BC = 5
 235     WHOLE_REG = 6
 236
 237 @unique
 238 class CROutSel(Enum):
 239     NONE = 0
 240     CR0 = 1
 241     BF = 2
 242     BT = 3
 243     WHOLE_REG = 4
 244
 245
 246 # SPRs - Special-Purpose Registers.  See V3.0B Figure 18 p971 and
 247 # http://libre-riscv.org/openpower/isatables/sprs.csv
 248 # http://bugs.libre-riscv.org/show_bug.cgi?id=261
 249
 250 spr_csv = get_csv("sprs.csv")
 251 spr_info = namedtuple('spr_info', 'SPR priv_mtspr priv_mfspr length')
 252 spr_dict = {}
 253 for row in spr_csv:
 254     info = spr_info(SPR=row['SPR'], priv_mtspr=row['priv_mtspr'],
 255                     priv_mfspr=row['priv_mfspr'], length=int(row['len']))
 256     spr_dict[int(row['Idx'])] = info
 257 fields = [(row['SPR'], int(row['Idx'])) for row in spr_csv]
 258 SPR = Enum('SPR', fields)
 259
 260
 261 XER_bits = {
 262     'SO': 32,
 263     'OV': 33,
 264     'CA': 34,
 265     'OV32': 44,
 266     'CA32': 45
 267     }