power parser should work
[soc.git] / src / soc / decoder / power_pseudo.py
1 # Based on GardenSnake - a parser generator demonstration program
2 # GardenSnake was released into the Public Domain by Andrew Dalke.
3
4 # Portions of this work are derived from Python's Grammar definition
5 # and may be covered under the Python copyright and license
6 #
7 # Andrew Dalke / Dalke Scientific Software, LLC
8 # 30 August 2006 / Cape Town, South Africa
9
10 # Modifications for inclusion in PLY distribution
11 import sys
12 from pprint import pprint
13 from copy import copy
14 from ply import lex, yacc
15 import astor
16 import ast
17
18 from soc.decoder.power_decoder import create_pdecode
19 from nmigen.back.pysim import Simulator, Delay
20 from nmigen import Module, Signal
21
22 from soc.decoder.pseudo.parser import GardenSnakeCompiler
23 from soc.decoder.selectable_int import SelectableInt, selectconcat
24
25 ####### Test code #######
26
27 bpermd = r"""
28 perm <- [0] * 8
29 if index < 64:
30 index <- (RS)[8*i:8*i+7]
31 RA <- [0]*56 || perm[0:7]
32 print (RA)
33 """
34
35 bpermd = r"""
36 if index < 64 then index <- 0
37 else index <- 5
38 do while index < 5
39 index <- 0
40 leave
41 for i = 0 to 7
42 index <- 0
43 """
44
45 _bpermd = r"""
46 for i = 0 to 7
47 index <- (RS)[8*i:8*i+7]
48 if index < 64 then
49 permi <- (RB)[index]
50 else
51 permi <- 0
52 RA <- [0]*56|| perm[0:7]
53 """
54
55 cnttzd = """
56 n <- 0
57 do while n < 64
58 print (n)
59 if (RS)[63-n] = 0b1 then
60 leave
61 n <- n + 1
62 RA <- EXTZ64(n)
63 print (RA)
64 """
65
66 cmpi = """
67 if a < EXTS(SI) then
68 c <- 0b100
69 else if a > EXTS(SI) then
70 c <- 0b010
71 """
72
73 cmpi = """
74 RA[0:1] <- 0b11
75 """
76
77 cmpi = """
78 in_range <- ((x | y) &
79 (a | b))
80 in_range <- (x + y) - (a + b)
81 """
82
83 cmpi = """
84 (RA)[0:1] <- 1
85 src1 <- EXTZ((RA)[56:63])
86 CR[4*BF+32] <- 0b0
87 in_range <- src21lo <= src1 & src1 <= src21hi
88 """
89
90 cmpeqb = """
91 src1 <- GPR[RA]
92 src1 <- src1[0:56]
93 """
94
95 addpcis = """
96 D <- d0||d1||d2
97 """
98
99 #code = testreg
100 code = cnttzd
101 #code = cmpi
102 #code = cmpeqb
103 #code = addpcis
104 #code = bpermd
105
106
107 def tolist(num):
108 l = []
109 for i in range(64):
110 l.append(1 if (num & (1 << i)) else 0)
111 l.reverse()
112 return l
113
114
115 def get_reg_hex(reg):
116 return hex(reg.value)
117
118
119 class GPR(dict):
120 def __init__(self, sd, regfile):
121 dict.__init__(self)
122 self.sd = sd
123 self.regfile = regfile
124 for i in range(32):
125 self[i] = SelectableInt(0, 64)
126
127 def set_form(self, form):
128 self.form = form
129
130 def ___getitem__(self, attr):
131 print("GPR getitem", attr)
132 getform = self.sd.sigforms[self.form]
133 rnum = getattr(getform, attr)
134 print("GPR get", rnum, rnum, dir(rnum))
135 l = list(rnum)
136 print(l[0]._as_const())
137 # for x in rnum:
138 #print (x, x.value, dir(x))
139 #print (x.value, dir(x.value))
140 print(list(rnum))
141 return self.regfile[rnum]
142
143
144 def convert_to_python(pcode):
145
146 gsc = GardenSnakeCompiler()
147
148 tree = gsc.compile(pcode, mode="exec", filename="string")
149 tree = ast.fix_missing_locations(tree)
150 regsused = {'read_regs': gsc.parser.read_regs,
151 'write_regs': gsc.parser.write_regs,
152 'uninit_regs': gsc.parser.uninit_regs}
153 return astor.to_source(tree), regsused
154
155
156 def test():
157
158 gsc = GardenSnakeCompiler()
159
160 # XXX unused! see GPR instead
161 gsc.regfile = {}
162 for i in range(32):
163 gsc.regfile[i] = 0
164 gsc.gpr = GPR(gsc.parser.sd, gsc.regfile)
165
166 _compile = gsc.compile
167
168 tree = _compile(code, mode="single", filename="string")
169 tree = ast.fix_missing_locations(tree)
170 print(ast.dump(tree))
171
172 print("astor dump")
173 print(astor.dump_tree(tree))
174 print("to source")
175 source = astor.to_source(tree)
176 print(source)
177
178 # sys.exit(0)
179
180 # Set up the GardenSnake run-time environment
181 def print_(*args):
182 print("args", args)
183 print("-->", " ".join(map(str, args)))
184
185 from soc.decoder.helpers import (EXTS64, EXTZ64, ROTL64, ROTL32, MASK,)
186
187 d = {}
188 d["print"] = print_
189 d["EXTS64"] = EXTS64
190 d["EXTZ64"] = EXTZ64
191 d["SelectableInt"] = SelectableInt
192 d["concat"] = selectconcat
193 d["GPR"] = gsc.gpr
194
195 form = 'X'
196 gsc.gpr.set_form(form)
197 getform = gsc.parser.sd.sigforms[form]._asdict()
198 #print ("getform", form)
199 # for k, f in getform.items():
200 #print (k, f)
201 #d[k] = getform[k]
202
203 compiled_code = compile(source, mode="exec", filename="<string>")
204
205 m = Module()
206 comb = m.d.comb
207 instruction = Signal(32)
208
209 m.submodules.decode = decode = gsc.parser.sd
210 comb += decode.raw_opcode_in.eq(instruction)
211 sim = Simulator(m)
212
213 instr = [0x11111117]
214
215 def process():
216 for ins in instr:
217 print("0x{:X}".format(ins & 0xffffffff))
218
219 # ask the decoder to decode this binary data (endian'd)
220 yield decode.bigendian.eq(0) # little / big?
221 yield instruction.eq(ins) # raw binary instr.
222 yield Delay(1e-6)
223
224 # uninitialised regs, drop them into dict for function
225 for rname in gsc.parser.uninit_regs:
226 d[rname] = SelectableInt(0, 64) # uninitialised (to zero)
227 print("uninitialised", rname, get_reg_hex(d[rname]))
228
229 # read regs, drop them into dict for function
230 for rname in gsc.parser.read_regs:
231 regidx = yield getattr(decode.sigforms['X'], rname)
232 d[rname] = gsc.gpr[regidx]
233 print("read reg", rname, regidx, get_reg_hex(d[rname]))
234
235 exec(compiled_code, d) # code gets executed here in dict "d"
236 print("Done")
237
238 print(d.keys()) # shows the variables that may have been created
239
240 print(decode.sigforms['X'])
241 x = yield decode.sigforms['X'].RS
242 ra = yield decode.sigforms['X'].RA
243 print("RA", ra, d['RA'])
244 print("RS", x)
245
246 for wname in gsc.parser.write_regs:
247 reg = getform[wname]
248 print("write regs", wname, d[wname], reg)
249 regidx = yield reg
250 gsc.gpr[regidx] = d[wname]
251
252 sim.add_process(process)
253 with sim.write_vcd("simulator.vcd", "simulator.gtkw",
254 traces=decode.ports()):
255 sim.run()
256
257 for i in range(len(gsc.gpr)):
258 print("regfile", i, get_reg_hex(gsc.gpr[i]))
259
260
261 if __name__ == '__main__':
262 test()