src/soc/fu/div/core_stages.py

   1 # This stage is the setup stage that converts the inputs
   2 # into the values expected by DivPipeCore
   3
   4 from nmigen import (Module, Signal, Cat, Repl, Mux, Const, Array)
   5 from nmutil.pipemodbase import PipeModBase
   6 from ieee754.part.partsig import PartitionedSignal
   7 from soc.decoder.power_enums import MicrOp
   8
   9 from soc.decoder.power_fields import DecodeFields
  10 from soc.decoder.power_fieldsn import SignalBitRange
  11 from soc.fu.div.pipe_data import (CoreInputData,
  12                                   CoreInterstageData,
  13                                   CoreOutputData)
  14 from ieee754.div_rem_sqrt_rsqrt.core import (DivPipeCoreSetupStage,
  15                                              DivPipeCoreCalculateStage,
  16                                              DivPipeCoreFinalStage)
  17
  18 __all__ = ["DivCoreBaseStage", "DivCoreSetupStage",
  19            "DivCoreCalculateStage", "DivCoreFinalStage"]
  20
  21
  22 class DivCoreBaseStage(PipeModBase):
  23     def __init__(self, pspec, modname, core_class, *args, **kwargs):
  24         super().__init__(pspec, modname)
  25         self.core = core_class(pspec.core_config, *args, **kwargs)
  26
  27     def elaborate(self, platform):
  28         m = Module()
  29
  30         # pass-through on non-core parameters
  31         m.d.comb += self.o.eq_without_core(self.i)
  32
  33         m.submodules.core = self.core
  34
  35         # copy parameters to/from divremsqrt core into the Base, here.
  36         m.d.comb += self.core.i.eq(self.i.core)
  37         m.d.comb += self.o.core.eq(self.core.o)
  38
  39         return m
  40
  41
  42 class DivCoreSetupStage(DivCoreBaseStage):
  43     def __init__(self, pspec):
  44         super().__init__(pspec, "core_setup_stage", DivPipeCoreSetupStage)
  45
  46     def ispec(self):
  47         return CoreInputData(self.pspec)
  48
  49     def ospec(self):
  50         return CoreInterstageData(self.pspec)
  51
  52
  53 class DivCoreCalculateStage(DivCoreBaseStage):
  54     def __init__(self, pspec, stage_index):
  55         super().__init__(pspec, f"core_calculate_stage_{stage_index}",
  56                          DivPipeCoreCalculateStage, stage_index)
  57
  58     def ispec(self):
  59         return CoreInterstageData(self.pspec)
  60
  61     def ospec(self):
  62         return CoreInterstageData(self.pspec)
  63
  64
  65 class DivCoreFinalStage(DivCoreBaseStage):
  66     def __init__(self, pspec):
  67         super().__init__(pspec, "core_final_stage", DivPipeCoreFinalStage)
  68
  69     def ispec(self):
  70         return CoreInterstageData(self.pspec)
  71
  72     def ospec(self):
  73         return CoreOutputData(self.pspec)