src/soc/fu/ldst/pipe_data.py

   1 from nmigen import Signal, Const
   2 from soc.fu.alu.alu_input_record import CompLDSTOpSubset
   3 from soc.fu.pipe_data import IntegerData, CommonPipeSpec
   4 from ieee754.fpcommon.getop import FPPipeContext
   5 from soc.decoder.power_decoder2 import Data
   6
   7
   8 class LDSTInputData(IntegerData):
   9     regspec = [('INT', 'a', '0:63'),
  10                ('INT', 'b', '0:63'),
  11                ('INT', 'c', '0:63'),
  12                ('XER', 'xer_so', '32')]
  13                ]
  14     def __init__(self, pspec):
  15         super().__init__(pspec)
  16         self.a = Signal(64, reset_less=True) # RA
  17         self.b = Signal(64, reset_less=True) # RB/immediate
  18         self.c = Signal(64, reset_less=True) # RC
  19         self.xer_so = Signal(reset_less=True) # XER bit 32: SO
  20
  21     def __iter__(self):
  22         yield from super().__iter__()
  23         yield self.a
  24         yield self.b
  25         yield self.c
  26         yield self.xer_so
  27
  28     def eq(self, i):
  29         lst = super().eq(i)
  30         return lst + [self.a.eq(i.a), self.b.eq(i.b), self.c.eq(i.c),
  31                       self.xer_so.eq(i.xer_so)]
  32
  33
  34 class LDSTOutputData(IntegerData):
  35     regspec = [('INT', 'o', '0:63'),
  36                ('INT', 'ea', '0:63'),
  37                ('CR', 'cr0', '0:3'),
  38                ('XER', 'xer_so', '32')]
  39     def __init__(self, pspec):
  40         super().__init__(pspec)
  41         self.o = Data(64, name="stage_o")
  42         self.ea = Data(64, name="ea")
  43         self.cr0 = Data(4, name="cr0")
  44         self.xer_so = Data(1, name="xer_so")
  45
  46     def __iter__(self):
  47         yield from super().__iter__()
  48         yield self.o
  49         yield self.ea
  50         yield self.xer_ca
  51         yield self.cr0
  52         yield self.xer_so
  53
  54     def eq(self, i):
  55         lst = super().eq(i)
  56         return lst + [self.o.eq(i.o),
  57                       self.ea.eq(i.ea),
  58                       self.cr0.eq(i.cr0),
  59                       self.xer_so.eq(i.xer_so)]
  60
  61
  62 class LDSTPipeSpec(CommonPipeSpec):
  63     regspec = (LDSTInputData.regspec, LDSTOutputData.regspec)
  64     opsubsetkls = CompLDSTOpSubset