60011e3b3ceb1203852019188e30a7cbf904a658
[soc.git] / src / soc / fu / mmu / test / test_issuer_mmu_data_path.py
1 from nmigen import Module, Signal
2 from soc.simple.test.test_issuer import TestRunner
3 from soc.simulator.program import Program
4 from soc.config.endian import bigendian
5 import unittest
6
7 from soc.fu.test.common import (
8 TestAccumulatorBase, skip_case, TestCase, ALUHelpers)
9
10 # this test case takes about half a minute to run on my Talos II
11 class MMUDataPathTestCase(TestAccumulatorBase):
12 # MMU handles MTSPR, MFSPR, DCBZ and TLBIE.
13 # other instructions here -> must be load/store
14
15 def case_mfspr_after_invalid_load(self):
16 lst = [
17 "tlbie 0,0,0,0,0" # RB,RS,RIC,PRS,R
18 ]
19
20 initial_regs = [0] * 32
21
22 #FIXME initial_sprs = {'DSISR': 0x12345678, 'DAR': 0x87654321}
23 initial_sprs = {}
24 self.add_case(Program(lst, bigendian),
25 initial_regs, initial_sprs)
26
27
28 if __name__ == "__main__":
29 unittest.main(exit=False)
30 suite = unittest.TestSuite()
31 suite.addTest(TestRunner(MMUDataPathTestCase().test_data))
32
33 runner = unittest.TextTestRunner()
34 runner.run(suite)