dcache.py commit first full tranlation pass, about five percent left
[soc.git] / src / soc / fu / mul / mul_input_record.py
1 from soc.fu.base_input_record import CompOpSubsetBase
2 from nmigen.hdl.rec import Layout
3
4 from soc.decoder.power_enums import MicrOp, Function, CryIn
5
6
7 class CompMULOpSubset(CompOpSubsetBase):
8 """CompMULOpSubset
9
10 a copy of the relevant subset information from Decode2Execute1Type
11 needed for MUL operations. use with eq_from_execute1 (below) to
12 grab subsets.
13 """
14 def __init__(self, name=None):
15 layout = (('insn_type', MicrOp),
16 ('fn_unit', Function),
17 ('imm_data', Layout((("imm", 64), ("imm_ok", 1)))),
18 ('rc', Layout((("rc", 1), ("rc_ok", 1)))), # Data
19 ('oe', Layout((("oe", 1), ("oe_ok", 1)))), # Data
20 ('invert_a', 1),
21 ('zero_a', 1),
22 ('invert_out', 1),
23 ('write_cr0', 1),
24 ('is_32bit', 1),
25 ('is_signed', 1),
26 ('insn', 32),
27 )
28
29 super().__init__(layout, name=name)
30