okaaay add a "rdflags" function which obtains the yes/no flags for each register...
[soc.git] / src / soc / fu / mul / pipeline.py
1 from nmutil.singlepipe import ControlBase
2 from nmutil.pipemodbase import PipeModBaseChain
3 from soc.fu.shift_rot.input_stage import ShiftRotInputStage
4 from soc.fu.shift_rot.main_stage import ShiftRotMainStage
5 from soc.fu.alu.output_stage import ALUOutputStage
6
7 class MulStages1(PipeModBaseChain):
8 def get_chain(self):
9 inp = ALUInputStage(self.pspec)
10 main = MulMainStage1(self.pspec)
11 return [inp, main]
12
13 class MulStages2(PipeModBaseChain):
14 def get_chain(self):
15 main2 = MulMainStage2(self.pspec)
16 out = ALUOutputStage(self.pspec)
17 return [main2, out]
18
19
20 class ShiftRotBasePipe(ControlBase):
21 def __init__(self, pspec):
22 ControlBase.__init__(self)
23 self.pspec = pspec
24 self.pipe1 = MulStages1(pspec)
25 self.pipe2 = MulStages2(pspec)
26 self._eqs = self.connect([self.pipe1, self.pipe2])
27
28 def elaborate(self, platform):
29 m = ControlBase.elaborate(self, platform)
30 m.submodules.pipe = self.pipe1
31 m.d.comb += self._eqs
32 return m