src/soc/fu/shift_rot/pipe_data.py

   1 from nmigen import Signal, Const, Cat
   2 from nmutil.dynamicpipe import SimpleHandshakeRedir
   3 from soc.fu.shift_rot.sr_input_record import CompSROpSubset
   4 from ieee754.fpcommon.getop import FPPipeContext
   5 from soc.fu.pipe_data import IntegerData, CommonPipeSpec
   6 from soc.fu.logical.pipe_data import LogicalOutputData
   7 from nmutil.dynamicpipe import SimpleHandshakeRedir
   8
   9
  10 class ShiftRotInputData(IntegerData):
  11     regspec = [('INT', 'ra', '0:63'),      # RA
  12                ('INT', 'rb', '0:63'),      # RB
  13                ('INT', 'rc', '0:63'),      # RS
  14                ('XER', 'xer_ca', '34,45')] # XER bit 34/45: CA/CA32
  15     def __init__(self, pspec):
  16         super().__init__(pspec, False)
  17         # convenience
  18         self.a, self.rs = self.ra, self.rc
  19
  20
  21 class ShiftRotPipeSpec(CommonPipeSpec):
  22     regspec = (ShiftRotInputData.regspec, LogicalOutputData.regspec)
  23     opsubsetkls = CompSROpSubset