move to common ALUHelpers for CR test_pipe_caller.py
[soc.git] / src / soc / fu / test / common.py
1 class TestCase:
2 def __init__(self, program, name, regs=None, sprs=None, cr=0, mem=None,
3 msr=0):
4
5 self.program = program
6 self.name = name
7
8 if regs is None:
9 regs = [0] * 32
10 if sprs is None:
11 sprs = {}
12 if mem is None:
13 mem = {}
14 self.regs = regs
15 self.sprs = sprs
16 self.cr = cr
17 self.mem = mem
18 self.msr = msr
19
20 class ALUHelpers:
21
22 def set_int_ra(alu, dec2, inp):
23 if 'ra' in inp:
24 yield alu.p.data_i.ra.eq(inp['ra'])
25 else:
26 yield alu.p.data_i.ra.eq(0)
27
28 def set_int_rb(alu, dec2, inp):
29 yield alu.p.data_i.rb.eq(0)
30 if 'rb' in inp:
31 yield alu.p.data_i.rb.eq(inp['rb'])
32 # If there's an immediate, set the B operand to that
33 imm_ok = yield dec2.e.imm_data.imm_ok
34 if imm_ok:
35 data2 = yield dec2.e.imm_data.imm
36 yield alu.p.data_i.b.eq(data2)
37
38 def set_xer_ca(alu, dec2, inp):
39 if 'xer_ca' in inp:
40 yield alu.p.data_i.xer_ca.eq(inp['xer_ca'])
41 print ("extra inputs: CA/32", bin(inp['xer_ca']))
42
43 def set_xer_so(alu, dec2, inp):
44 if 'xer_so' in inp:
45 so = inp['xer_so']
46 print ("extra inputs: so", so)
47 yield alu.p.data_i.xer_so.eq(so)
48
49 def set_fast_cia(alu, dec2, inp):
50 if 'cia' in inp:
51 yield alu.p.data_i.cia.eq(inp['cia'])
52
53 def set_fast_spr1(alu, dec2, inp):
54 if 'spr1' in inp:
55 yield alu.p.data_i.spr1.eq(inp['spr1'])
56
57 def set_fast_spr2(alu, dec2, inp):
58 if 'spr2' in inp:
59 yield alu.p.data_i.spr2.eq(inp['spr2'])
60
61 def set_cr_a(alu, dec2, inp):
62 if 'cr_a' in inp:
63 yield alu.p.data_i.cr_a.eq(inp['cr_a'])
64
65 def set_cr_b(alu, dec2, inp):
66 if 'cr_b' in inp:
67 yield alu.p.data_i.cr_b.eq(inp['cr_b'])
68
69 def set_cr_c(alu, dec2, inp):
70 if 'cr_c' in inp:
71 yield alu.p.data_i.cr_c.eq(inp['cr_c'])
72
73 def set_full_cr(alu, dec2, inp):
74 if 'full_cr' in inp:
75 yield alu.p.data_i.full_cr.eq(inp['full_cr'])
76 else:
77 yield alu.p.data_i.full_cr.eq(0)
78