src/soc/fu/test/common.py

   1 class TestCase:
   2     def __init__(self, program, name, regs=None, sprs=None, cr=0, mem=None,
   3                        msr=0):
   4
   5         self.program = program
   6         self.name = name
   7
   8         if regs is None:
   9             regs = [0] * 32
  10         if sprs is None:
  11             sprs = {}
  12         if mem is None:
  13             mem = {}
  14         self.regs = regs
  15         self.sprs = sprs
  16         self.cr = cr
  17         self.mem = mem
  18         self.msr = msr
  19
  20 class ALUHelpers:
  21
  22     def set_int_ra(alu, dec2, inp):
  23         if 'ra' in inp:
  24             yield alu.p.data_i.ra.eq(inp['ra'])
  25         else:
  26             yield alu.p.data_i.ra.eq(0)
  27
  28     def set_int_rb(alu, dec2, inp):
  29         yield alu.p.data_i.rb.eq(0)
  30         if 'rb' in inp:
  31             yield alu.p.data_i.rb.eq(inp['rb'])
  32         # If there's an immediate, set the B operand to that
  33         imm_ok = yield dec2.e.imm_data.imm_ok
  34         if imm_ok:
  35             data2 = yield dec2.e.imm_data.imm
  36             yield alu.p.data_i.rb.eq(data2)
  37
  38     def set_int_rc(alu, dec2, inp):
  39         if 'rc' in inp:
  40             yield alu.p.data_i.rc.eq(inp['rc'])
  41         else:
  42             yield alu.p.data_i.rc.eq(0)
  43
  44     def set_xer_ca(alu, dec2, inp):
  45         if 'xer_ca' in inp:
  46             yield alu.p.data_i.xer_ca.eq(inp['xer_ca'])
  47             print ("extra inputs: CA/32", bin(inp['xer_ca']))
  48
  49     def set_xer_so(alu, dec2, inp):
  50         if 'xer_so' in inp:
  51             so = inp['xer_so']
  52             print ("extra inputs: so", so)
  53             yield alu.p.data_i.xer_so.eq(so)
  54
  55     def set_fast_cia(alu, dec2, inp):
  56         if 'cia' in inp:
  57             yield alu.p.data_i.cia.eq(inp['cia'])
  58
  59     def set_fast_spr1(alu, dec2, inp):
  60         if 'spr1' in inp:
  61             yield alu.p.data_i.spr1.eq(inp['spr1'])
  62
  63     def set_fast_spr2(alu, dec2, inp):
  64         if 'spr2' in inp:
  65             yield alu.p.data_i.spr2.eq(inp['spr2'])
  66
  67     def set_cr_a(alu, dec2, inp):
  68         if 'cr_a' in inp:
  69             yield alu.p.data_i.cr_a.eq(inp['cr_a'])
  70
  71     def set_cr_b(alu, dec2, inp):
  72         if 'cr_b' in inp:
  73             yield alu.p.data_i.cr_b.eq(inp['cr_b'])
  74
  75     def set_cr_c(alu, dec2, inp):
  76         if 'cr_c' in inp:
  77             yield alu.p.data_i.cr_c.eq(inp['cr_c'])
  78
  79     def set_full_cr(alu, dec2, inp):
  80         if 'full_cr' in inp:
  81             yield alu.p.data_i.full_cr.eq(inp['full_cr'])
  82         else:
  83             yield alu.p.data_i.full_cr.eq(0)
  84
  85     def get_int_o(res, alu, dec2):
  86         out_reg_valid = yield dec2.e.write_reg.ok
  87         if out_reg_valid:
  88             res['o'] = yield alu.n.data_o.o.data
  89
  90     def get_cr_a(res, alu, dec2):
  91         cridx_ok = yield dec2.e.write_cr.ok
  92         if cridx_ok:
  93             res['cr_a'] = yield alu.n.data_o.cr0.data
  94
  95     def get_sim_int_o(res, sim, dec2):
  96         out_reg_valid = yield dec2.e.write_reg.ok
  97         if out_reg_valid:
  98             write_reg_idx = yield dec2.e.write_reg.data
  99             res['o'] = sim.gpr(write_reg_idx).value
 100
 101     def get_sim_cr_a(res, sim, dec2):
 102         cridx_ok = yield dec2.e.write_cr.ok
 103         if cridx_ok:
 104             cridx = yield dec2.e.write_cr.data
 105             res['cr_a'] = sim.crl[cridx].get_range().value
 106
 107     def check_int_o(dut, res, sim_o, msg):
 108         if 'o' in res:
 109             expected = sim_o['o']
 110             alu_out = res['o']
 111             print(f"expected {expected:x}, actual: {alu_out:x}")
 112             dut.assertEqual(expected, alu_out, msg)
 113
 114     def check_cr_a(dut, res, sim_o, msg):
 115         if 'cr_a' in res:
 116             cr_expected = sim_o['cr_a']
 117             cr_actual = res['cr_a']
 118             print ("CR", cr_expected, cr_actual)
 119             dut.assertEqual(cr_expected, cr_actual, msg)
 120