1 from soc
.fu
.pipe_data
import IntegerData
2 from soc
.fu
.alu
.alu_input_record
import CompALUOpSubset
# TODO: replace
5 class TrapInputData(IntegerData
):
6 regspec
= [('INT', 'ra', '0:63'), # RA
7 ('INT', 'rb', '0:63'), # RB/immediate
8 ('FAST', 'spr1', '0:63'), # SRR0
9 ('FAST', 'cia', '0:63'), # Program counter (current)
10 ('FAST', 'msr', '0:63')] # MSR
11 def __init__(self
, pspec
):
12 super().__init
__(pspec
, False)
14 self
.srr0
, self
.a
, self
.b
= self
.spr1
, self
.ra
, self
.rb
17 class TrapOutputData(IntegerData
):
18 regspec
= [('INT', 'o', '0:63'), # RA
19 ('FAST', 'spr1', '0:63'), # SRR0 SPR
20 ('FAST', 'spr2', '0:63'), # SRR1 SPR
21 ('FAST', 'nia', '0:63'), # NIA (Next PC)
22 ('FAST', 'msr', '0:63')] # MSR
23 def __init__(self
, pspec
):
24 super().__init
__(pspec
, True)
26 self
.srr0
, self
.srr1
= self
.spr1
, self
.spr2
30 # TODO: replace CompALUOpSubset with CompTrapOpSubset
32 regspec
= (TrapInputData
.regspec
, TrapOutputData
.regspec
)
33 opsubsetkls
= CompALUOpSubset