src/soc/fu/trap/pipe_data.py

   1 from nmigen import Signal, Const
   2 from ieee754.fpcommon.getop import FPPipeContext
   3 from soc.fu.pipe_data import IntegerData
   4 from soc.decoder.power_decoder2 import Data
   5 from nmutil.dynamicpipe import SimpleHandshakeRedir
   6 from soc.fu.alu.alu_input_record import CompALUOpSubset # TODO: replace
   7
   8
   9 class TrapInputData(IntegerData):
  10     regspec = [('INT', 'ra', '0:63'),  # RA
  11                ('INT', 'rb', '0:63'),  # RB/immediate
  12                ('FAST', 'spr1', '0:63'), # SRR0
  13                ('FAST', 'cia', '0:63'),  # Program counter (current)
  14                ('FAST', 'msr', '0:63')]  # MSR
  15     def __init__(self, pspec):
  16         super().__init__(pspec, False)
  17         # convenience
  18         self.srr0, self.a, self.b = self.spr1, self.ra, self.rb
  19
  20
  21 class TrapOutputData(IntegerData):
  22     regspec = [('INT', 'o', '0:63'),     # RA
  23                ('FAST', 'spr1', '0:63'), # SRR0 SPR
  24                ('FAST', 'spr2', '0:63'), # SRR1 SPR
  25                ('FAST', 'nia', '0:63'),  # NIA (Next PC)
  26                ('FAST', 'msr', '0:63')]  # MSR
  27     def __init__(self, pspec):
  28         super().__init__(pspec, True)
  29         # convenience
  30         self.srr0, self.srr1 = self.spr1, self.spr2
  31
  32
  33
  34 # TODO: replace CompALUOpSubset with CompTrapOpSubset
  35 class TrapPipeSpec:
  36     regspec = (TrapInputData.regspec, TrapOutputData.regspec)
  37     opsubsetkls = CompALUOpSubset
  38     def __init__(self, id_wid, op_wid):
  39         self.id_wid = id_wid
  40         self.op_wid = op_wid
  41         self.opkls = lambda _: self.opsubsetkls(name="op")
  42         self.stage = None
  43         self.pipekls = SimpleHandshakeRedir