d2e157d79ed687bb8287f2d69beac6c90c69979c
[soc.git] / src / soc / litex / florent / versa_ecp5.py
1 #!/usr/bin/env python3
2
3 import os
4 import argparse
5
6 from litex_boards.platforms import versa_ecp5
7 from litex_boards.targets.versa_ecp5 import _CRG, BaseSoC
8
9 from litex.soc.integration.soc_sdram import (soc_sdram_args,
10 soc_sdram_argdict)
11 from litex.soc.integration.builder import (Builder, builder_args,
12 builder_argdict)
13
14 from libresoc import LibreSoC
15 #from microwatt import Microwatt
16
17 # TestSoC ------------------------------------------------------------------------------------------
18
19 class TestSoC(BaseSoC):
20 def __init__(self, sys_clk_freq=int(16e6), **kwargs):
21 kwargs["integrated_rom_size"] = 0x10000
22 #kwargs["integrated_main_ram_size"] = 0x1000
23 kwargs["csr_data_width"] = 32
24 kwargs["l2_size"] = 0
25 #bus_data_width = 16,
26 BaseSoC.__init__(self, sys_clk_freq,
27 cpu_type = "external",
28 cpu_cls = LibreSoC,
29 #cpu_cls = Microwatt,
30 device = "LFE5UM",
31 **kwargs)
32
33 #self.add_constant("MEMTEST_BUS_SIZE", 256//16)
34 #self.add_constant("MEMTEST_DATA_SIZE", 256//16)
35 #self.add_constant("MEMTEST_ADDR_SIZE", 256//16)
36
37 #self.add_constant("MEMTEST_BUS_DEBUG", 1)
38 #self.add_constant("MEMTEST_ADDR_DEBUG", 1)
39 #self.add_constant("MEMTEST_DATA_DEBUG", 1)
40
41 # Build --------------------------------------------------------------------------------------------
42
43 def main():
44 parser = argparse.ArgumentParser(
45 description="LiteX SoC with LibreSoC CPU on Versa ECP5")
46 parser.add_argument("--build", action="store_true", help="Build bitstream")
47 parser.add_argument("--load", action="store_true", help="Load bitstream")
48 parser.add_argument("--sys-clk-freq", default=int(16e6),
49 help="System clock frequency (default=16MHz)")
50
51 builder_args(parser)
52 soc_sdram_args(parser)
53 args = parser.parse_args()
54
55 soc = TestSoC(sys_clk_freq=int(float(args.sys_clk_freq)),
56 **soc_sdram_argdict(args))
57 builder = Builder(soc, **builder_argdict(args))
58 builder.build(run=args.build)
59
60 if args.load:
61 prog = soc.platform.create_programmer()
62 prog.load_bitstream(os.path.join(builder.gateware_dir, soc.build_name + ".svf"))
63
64 if __name__ == "__main__":
65 main()