radix: reading first page table entry
[soc.git] / src / soc / memory_pipe_experiment / memory_op.py
1 import enum
2 from nmutil.iocontrol import Object
3 from nmigen import Signal
4 from .config import MemoryPipeConfig
5
6
7 class MemoryOpKind(enum.IntEnum):
8 Fence = enum.auto()
9 Read = enum.auto()
10 Write = enum.auto()
11 AMO = enum.auto()
12 LoadLinked = enum.auto()
13 StoreConditional = enum.auto()
14
15
16 class MemoryOpData(Object):
17 def __init__(self, config: MemoryPipeConfig):
18 self.config = config
19 Object.__init__(self)
20 self.kind = Signal(MemoryOpKind)
21 self.is_cachable = Signal()
22 self.blocks_combining_with_earlier_reads = Signal()
23 self.blocks_combining_with_earlier_writes = Signal()
24 self.blocks_combining_with_later_reads = Signal()
25 self.blocks_combining_with_later_writes = Signal()
26 self.is_speculative = Signal()
27 self.physical_address = Signal(config.physical_address_bits)
28 self.byte_mask = Signal(config.bytes_per_cache_line)
29 self.fu_op_id = Signal(config.fu_op_id_shape,
30 reset=self.config.fu_op_id_nop_value)
31
32 @property
33 def is_empty(self):
34 self.fu_op_id == self.config.fu_op_id_nop_value
35
36 def eq_empty(self):
37 """ assign self to the canonical empty value. """
38 return self.eq(MemoryOpData(self.config))